arm64: dts: ls2081a-rdb: Add DTS for NXP LS2081ARDB

This patch adds support for NXP LS2081ARDB board which has LS2081A SoC.

LS2081A SoC is 40-pin derivative of LS2088A SoC. From functional
perspective both are same. Hence, LS2088a SoC dtsi file is included
from LS2081ARDB dts.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Tao Yang <b31903@freescale.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 912a660d6f74b656d400afb135b0694c2179cddd..3ea9edc87909a315f25aa8775d6d953062965ece 100644 (file)
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -23,6 +23,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-rdb.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-ten64.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2081a-rdb.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
new file mode 100644 (file)
index 0000000..4461e16
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for NXP LS2081A RDB Board.
+ *
+ * Copyright 2017 NXP
+ *
+ * Priyanka Jain <priyanka.jain@nxp.com>
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-ls2088a.dtsi"
+
+/ {
+       model = "NXP Layerscape 2081A RDB Board";
+       compatible = "fsl,ls2081a-rdb", "fsl,ls2081a";
+
+       aliases {
+               serial0 = &serial0;
+               serial1 = &serial1;
+       };
+
+       chosen {
+               stdout-path = "serial1:115200n8";
+       };
+};
+
+&dspi {
+       status = "okay";
+
+       n25q512a: flash@0 {
+               compatible = "jedec,spi-nor";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               spi-max-frequency = <3000000>;
+               reg = <0>;
+       };
+};
+
+&esdhc {
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+
+       pca9547: mux@75 {
+               compatible = "nxp,pca9547";
+               reg = <0x75>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               i2c@1 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x1>;
+
+                       rtc@51 {
+                               compatible = "nxp,pcf2129";
+                               reg = <0x51>;
+                       };
+               };
+
+               i2c@2 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x2>;
+
+                       ina220@40 {
+                               compatible = "ti,ina220";
+                               reg = <0x40>;
+                               shunt-resistor = <500>;
+                       };
+               };
+
+               i2c@3 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x3>;
+
+                       adt7481@4c {
+                               compatible = "adi,adt7461";
+                               reg = <0x4c>;
+                       };
+               };
+       };
+};
+
+&ifc {
+       status = "disabled";
+};
+
+&qspi {
+       status = "okay";
+
+       s25fs512s0: flash@0 {
+               compatible = "jedec,spi-nor";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               spi-rx-bus-width = <4>;
+               spi-tx-bus-width = <4>;
+               spi-max-frequency = <20000000>;
+               reg = <0>;
+       };
+
+       s25fs512s1: flash@1 {
+               compatible = "jedec,spi-nor";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               spi-rx-bus-width = <4>;
+               spi-tx-bus-width = <4>;
+               spi-max-frequency = <20000000>;
+               reg = <1>;
+       };
+};
+
+&sata0 {
+       status = "okay";
+};
+
+&sata1 {
+       status = "okay";
+};
+
+&usb0 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};