riscv: cpu: Add 64bit hartid support on RV64

The hartid can be a 64bit value on RV64 platforms.

Add support for 64bit hartid in riscv_of_processor_hartid() and
update its callers.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20220527051743.2829940-5-sunilvl@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h
index 21c8072dce17aaf5f818b1fdc6ead92279d60608..19eedd4af4cdee092b54ef60e5c4d7270bba44a0 100644 (file)
--- a/arch/riscv/include/asm/processor.h
+++ b/arch/riscv/include/asm/processor.h
@@ -79,8 +79,8 @@ static inline void wait_for_interrupt(void)
 }
 
 struct device_node;
-int riscv_of_processor_hartid(struct device_node *node);
-int riscv_of_parent_hartid(struct device_node *node);
+int riscv_of_processor_hartid(struct device_node *node, unsigned long *hartid);
+int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid);
 
 extern void riscv_fill_hwcap(void);
 extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);

diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index fba9e9f46a8c7aa4cc54c681341caaab368f9f1a..022fd18619929764d4c30ab237da9bc332c06092 100644 (file)
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -14,37 +14,36 @@
  * Returns the hart ID of the given device tree node, or -ENODEV if the node
  * isn't an enabled and valid RISC-V hart node.
  */
-int riscv_of_processor_hartid(struct device_node *node)
+int riscv_of_processor_hartid(struct device_node *node, unsigned long *hart)
 {
        const char *isa;
-       u32 hart;
 
        if (!of_device_is_compatible(node, "riscv")) {
                pr_warn("Found incompatible CPU\n");
                return -ENODEV;
        }
 
-       hart = of_get_cpu_hwid(node, 0);
-       if (hart == ~0U) {
+       *hart = (unsigned long) of_get_cpu_hwid(node, 0);
+       if (*hart == ~0UL) {
                pr_warn("Found CPU without hart ID\n");
                return -ENODEV;
        }
 
        if (!of_device_is_available(node)) {
-               pr_info("CPU with hartid=%d is not available\n", hart);
+               pr_info("CPU with hartid=%lu is not available\n", *hart);
                return -ENODEV;
        }
 
        if (of_property_read_string(node, "riscv,isa", &isa)) {
-               pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart);
+               pr_warn("CPU with hartid=%lu has no \"riscv,isa\" property\n", *hart);
                return -ENODEV;
        }
        if (isa[0] != 'r' || isa[1] != 'v') {
-               pr_warn("CPU with hartid=%d has an invalid ISA of \"%s\"\n", hart, isa);
+               pr_warn("CPU with hartid=%lu has an invalid ISA of \"%s\"\n", *hart, isa);
                return -ENODEV;
        }
 
-       return hart;
+       return 0;
 }
 
 /*
@@ -53,11 +52,16 @@ int riscv_of_processor_hartid(struct device_node *node)
  * To achieve this, we walk up the DT tree until we find an active
  * RISC-V core (HART) node and extract the cpuid from it.
  */
-int riscv_of_parent_hartid(struct device_node *node)
+int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid)
 {
+       int rc;
+
        for (; node; node = node->parent) {
-               if (of_device_is_compatible(node, "riscv"))
-                       return riscv_of_processor_hartid(node);
+               if (of_device_is_compatible(node, "riscv")) {
+                       rc = riscv_of_processor_hartid(node, hartid);
+                       if (!rc)
+                               return 0;
+               }
        }
 
        return -1;

diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index a6f62a6d1edd92ca1cade5fd802daf718b08f35c..a08a54136c7aadbc7ef7718b3fe907ea53298aa5 100644 (file)
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -73,8 +73,9 @@ void __init riscv_fill_hwcap(void)
        struct device_node *node;
        const char *isa;
        char print_str[NUM_ALPHA_EXTS + 1];
-       int i, j;
+       int i, j, rc;
        static unsigned long isa2hwcap[256] = {0};
+       unsigned long hartid;
 
        isa2hwcap['i'] = isa2hwcap['I'] = COMPAT_HWCAP_ISA_I;
        isa2hwcap['m'] = isa2hwcap['M'] = COMPAT_HWCAP_ISA_M;
@@ -92,7 +93,8 @@ void __init riscv_fill_hwcap(void)
                DECLARE_BITMAP(this_isa, RISCV_ISA_EXT_MAX);
                const char *temp;
 
-               if (riscv_of_processor_hartid(node) < 0)
+               rc = riscv_of_processor_hartid(node, &hartid);
+               if (rc < 0)
                        continue;
 
                if (of_property_read_string(node, "riscv,isa", &isa)) {

diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index f1e4948a4b525208b88cac211d68536a53f506f7..a752c7b416838a35873363b50c5dd24dfd1ade42 100644 (file)
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -72,15 +72,16 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 void __init setup_smp(void)
 {
        struct device_node *dn;
-       int hart;
+       unsigned long hart;
        bool found_boot_cpu = false;
        int cpuid = 1;
+       int rc;
 
        cpu_set_ops(0);
 
        for_each_of_cpu_node(dn) {
-               hart = riscv_of_processor_hartid(dn);
-               if (hart < 0)
+               rc = riscv_of_processor_hartid(dn, &hart);
+               if (rc < 0)
                        continue;
 
                if (hart == cpuid_to_hartid_map(0)) {
@@ -90,7 +91,7 @@ void __init setup_smp(void)
                        continue;
                }
                if (cpuid >= NR_CPUS) {
-                       pr_warn("Invalid cpuid [%d] for hartid [%d]\n",
+                       pr_warn("Invalid cpuid [%d] for hartid [%lu]\n",
                                cpuid, hart);
                        continue;
                }

diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index 593d5a957b69dcbfe49e134342061497f3ff4231..e460df7ed799de6b00f3d86e2d0557b8f836e317 100644 (file)
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -101,20 +101,21 @@ static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id)
 
 static int __init riscv_timer_init_dt(struct device_node *n)
 {
-       int cpuid, hartid, error;
+       int cpuid, error;
+       unsigned long hartid;
        struct device_node *child;
        struct irq_domain *domain;
 
-       hartid = riscv_of_processor_hartid(n);
-       if (hartid < 0) {
-               pr_warn("Not valid hartid for node [%pOF] error = [%d]\n",
+       error = riscv_of_processor_hartid(n, &hartid);
+       if (error < 0) {
+               pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n",
                        n, hartid);
-               return hartid;
+               return error;
        }
 
        cpuid = riscv_hartid_to_cpuid(hartid);
        if (cpuid < 0) {
-               pr_warn("Invalid cpuid for hartid [%d]\n", hartid);
+               pr_warn("Invalid cpuid for hartid [%lu]\n", hartid);
                return cpuid;
        }
 
@@ -140,7 +141,7 @@ static int __init riscv_timer_init_dt(struct device_node *n)
                return -ENODEV;
        }
 
-       pr_info("%s: Registering clocksource cpuid [%d] hartid [%d]\n",
+       pr_info("%s: Registering clocksource cpuid [%d] hartid [%lu]\n",
               __func__, cpuid, hartid);
        error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
        if (error) {

diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
index b65bd8878d4f181394a90a5d0e0a27cc760b5aba..499e5f81b3fe33f913fc810aa11251c59021d86f 100644 (file)
--- a/drivers/irqchip/irq-riscv-intc.c
+++ b/drivers/irqchip/irq-riscv-intc.c
@@ -95,10 +95,11 @@ static const struct irq_domain_ops riscv_intc_domain_ops = {
 static int __init riscv_intc_init(struct device_node *node,
                                  struct device_node *parent)
 {
-       int rc, hartid;
+       int rc;
+       unsigned long hartid;
 
-       hartid = riscv_of_parent_hartid(node);
-       if (hartid < 0) {
+       rc = riscv_of_parent_hartid(node, &hartid);
+       if (rc < 0) {
                pr_warn("unable to find hart id for %pOF\n", node);
                return 0;
        }

diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index bb87e4c3b88e1c95688e830a5ef9d2a3f73b54be..4710d9741f367134381dba56c61e74762fadae6f 100644 (file)
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -317,7 +317,8 @@ static int __init plic_init(struct device_node *node,
        for (i = 0; i < nr_contexts; i++) {
                struct of_phandle_args parent;
                irq_hw_number_t hwirq;
-               int cpu, hartid;
+               int cpu;
+               unsigned long hartid;
 
                if (of_irq_parse_one(node, i, &parent)) {
                        pr_err("failed to parse parent for context %d.\n", i);
@@ -341,8 +342,8 @@ static int __init plic_init(struct device_node *node,
                        continue;
                }
 
-               hartid = riscv_of_parent_hartid(parent.np);
-               if (hartid < 0) {
+               error = riscv_of_parent_hartid(parent.np, &hartid);
+               if (error < 0) {
                        pr_warn("failed to parse hart ID for context %d.\n", i);
                        continue;
                }