arm64: dts: renesas: r8a779h0: Add CPUIdle support
authorDuy Nguyen <duy.nguyen.rh@renesas.com>
Thu, 1 Feb 2024 14:19:18 +0000 (15:19 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 22 Feb 2024 10:03:32 +0000 (11:03 +0100)
Support CPUIdle for ARM Cortex-A76 on R-Car V4M.

Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/848d176bdbcaf3bc44e5dae555afa9c812a19fd1.1706796979.git.geert+renesas@glider.be
arch/arm64/boot/dts/renesas/r8a779h0.dtsi

index 88c5dcbc38d59dabf5732d9f3877c592a5965ef6..b3255bba69e3e6da649b9c1a31f13e5ed162544a 100644 (file)
@@ -42,6 +42,7 @@
                        power-domains = <&sysc R8A779H0_PD_A1E0D0C0>;
                        next-level-cache = <&L3_CA76>;
                        enable-method = "psci";
+                       cpu-idle-states = <&CPU_SLEEP_0>;
                };
 
                a76_1: cpu@100 {
@@ -51,6 +52,7 @@
                        power-domains = <&sysc R8A779H0_PD_A1E0D0C1>;
                        next-level-cache = <&L3_CA76>;
                        enable-method = "psci";
+                       cpu-idle-states = <&CPU_SLEEP_0>;
                };
 
                a76_2: cpu@200 {
@@ -60,6 +62,7 @@
                        power-domains = <&sysc R8A779H0_PD_A1E0D0C2>;
                        next-level-cache = <&L3_CA76>;
                        enable-method = "psci";
+                       cpu-idle-states = <&CPU_SLEEP_0>;
                };
 
                a76_3: cpu@300 {
                        power-domains = <&sysc R8A779H0_PD_A1E0D0C3>;
                        next-level-cache = <&L3_CA76>;
                        enable-method = "psci";
+                       cpu-idle-states = <&CPU_SLEEP_0>;
+               };
+
+               idle-states {
+                       entry-method = "psci";
+
+                       CPU_SLEEP_0: cpu-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x0010000>;
+                               local-timer-stop;
+                               entry-latency-us = <400>;
+                               exit-latency-us = <500>;
+                               min-residency-us = <4000>;
+                       };
                };
 
                L3_CA76: cache-controller {