[IA64] Require SAL 3.2 in order to do extended config space ops

We had assumed that SAL firmware would return an error if it didn't
understand extended config space.  Unfortunately, the SAL on the SGI 750
doesn't do that, it panics the machine.  So, condition the extended PCI
config space accesses on SAL revision 3.2.

Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
Tested-by: Brad Spengler <spender@grsecurity.net>
Signed-off-by: Tony Luck <tony.luck@intel.com>

diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 7de76dd352fe4e6350ee0a8bf6d366fe05c66f35..c0fca2c1c858372493675695f9a5341200c139ae 100644 (file)
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -56,10 +56,13 @@ int raw_pci_read(unsigned int seg, unsigned int bus, unsigned int devfn,
        if ((seg | reg) <= 255) {
                addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg);
                mode = 0;
-       } else {
+       } else if (sal_revision >= SAL_VERSION_CODE(3,2)) {
                addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg);
                mode = 1;
+       } else {
+               return -EINVAL;
        }
+
        result = ia64_sal_pci_config_read(addr, mode, len, &data);
        if (result != 0)
                return -EINVAL;
@@ -80,9 +83,11 @@ int raw_pci_write(unsigned int seg, unsigned int bus, unsigned int devfn,
        if ((seg | reg) <= 255) {
                addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg);
                mode = 0;
-       } else {
+       } else if (sal_revision >= SAL_VERSION_CODE(3,2)) {
                addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg);
                mode = 1;
+       } else {
+               return -EINVAL;
        }
        result = ia64_sal_pci_config_write(addr, mode, len, value);
        if (result != 0)