drm/amd/display: Don't allow FPO if no planes

In DCN32/321 FPO uses per-pipe P-State force. If there is no plane, then
then HUBP is power gated, in which case any programming in HUBP has no
effect and the pipe is always asserting P-State allow. This is contrary
to what we want to happen for FPO (FW should moderate the P-State
assertion), so block FPO if there's no plane for the FPO pipe.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Reviewed-by: Samson Tam <samson.tam@amd.com>
Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c
index 1743ebcd6b2ee1c75882cb44ee2c7750f13b8c43..cca6436ecdf589cfa1a97f3f5b1eea0e36e60418 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c
@@ -524,13 +524,14 @@ static int get_refresh_rate(struct dc_stream_state *fpo_candidate_stream)
  *
  * Return: Pointer to FPO stream candidate if config can support FPO, otherwise NULL
  */
-struct dc_stream_state *dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, const struct dc_state *context)
+struct dc_stream_state *dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context)
 {
        int refresh_rate = 0;
        const int minimum_refreshrate_supported = 120;
        struct dc_stream_state *fpo_candidate_stream = NULL;
        bool is_fpo_vactive = false;
        uint32_t fpo_vactive_margin_us = 0;
+       struct dc_stream_status *fpo_stream_status = NULL;
 
        if (context == NULL)
                return NULL;
@@ -559,10 +560,21 @@ struct dc_stream_state *dcn32_can_support_mclk_switch_using_fw_based_vblank_stre
                DC_FP_END();
                if (!is_fpo_vactive || dc->debug.disable_fpo_vactive)
                        return NULL;
-       } else
+       } else {
                fpo_candidate_stream = context->streams[0];
+               if (fpo_candidate_stream)
+                       fpo_stream_status = dc_state_get_stream_status(context, fpo_candidate_stream);
+       }
 
-       if (!fpo_candidate_stream)
+       /* In DCN32/321, FPO uses per-pipe P-State force.
+        * If there's no planes, HUBP is power gated and
+        * therefore programming UCLK_PSTATE_FORCE does
+        * nothing (P-State will always be asserted naturally
+        * on a pipe that has HUBP power gated. Therefore we
+        * only want to enable FPO if the FPO pipe has both
+        * a stream and a plane.
+        */
+       if (!fpo_candidate_stream || !fpo_stream_status || fpo_stream_status->plane_count == 0)
                return NULL;
 
        if (fpo_candidate_stream->sink->edid_caps.panel_patch.disable_fams)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
index cc759b34268bbb0df485a171cfd4f6fcfc72ebb7..9f37f717a1f86f88c5fa41bc30f477406d70f3b8 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
@@ -3465,7 +3465,15 @@ void dcn32_assign_fpo_vactive_candidate(struct dc *dc, const struct dc_state *co
        for (i = 0, pipe_idx = 0; i < dc->res_pool->pipe_count; i++) {
                const struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
 
-               if (!pipe->stream)
+               /* In DCN32/321, FPO uses per-pipe P-State force.
+                * If there's no planes, HUBP is power gated and
+                * therefore programming UCLK_PSTATE_FORCE does
+                * nothing (P-State will always be asserted naturally
+                * on a pipe that has HUBP power gated. Therefore we
+                * only want to enable FPO if the FPO pipe has both
+                * a stream and a plane.
+                */
+               if (!pipe->stream || !pipe->plane_state)
                        continue;
 
                if (vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]] <= 0) {

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
index b27fadd452bb856b1397ea6cd44260030d5e1e8c..0c87b0fabba7d96ff38180900e41f1438419912c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
@@ -163,7 +163,7 @@ void dcn32_determine_det_override(struct dc *dc,
 void dcn32_set_det_allocations(struct dc *dc, struct dc_state *context,
        display_e2e_pipe_params_st *pipes);
 
-struct dc_stream_state *dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, const struct dc_state *context);
+struct dc_stream_state *dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context);
 
 bool dcn32_allow_subvp_with_active_margin(struct pipe_ctx *pipe);