arm64: dts: qcom: sm6350: Add PSCI idle states

Add the PSCI idle states so that the CPU (among other things) can
reach lower power states.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531-topic-rsc-v1-2-b4a985f57b8b@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 4dffd7974fa3922e7c43611b90f3d9cecc2ac062..a0e64f888de6f695d76b0308a19de06dc5a1b2b8 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -56,6 +56,8 @@
                        interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
                                         &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+                       power-domains = <&CPU_PD0>;
+                       power-domain-names = "psci";
                        #cooling-cells = <2>;
                        L2_0: l2-cache {
                                compatible = "cache";
@@ -82,6 +84,8 @@
                        interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
                                         &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+                       power-domains = <&CPU_PD1>;
+                       power-domain-names = "psci";
                        #cooling-cells = <2>;
                        L2_100: l2-cache {
                                compatible = "cache";
@@ -104,6 +108,8 @@
                        interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
                                         &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+                       power-domains = <&CPU_PD2>;
+                       power-domain-names = "psci";
                        #cooling-cells = <2>;
                        L2_200: l2-cache {
                                compatible = "cache";
@@ -126,6 +132,8 @@
                        interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
                                         &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+                       power-domains = <&CPU_PD3>;
+                       power-domain-names = "psci";
                        #cooling-cells = <2>;
                        L2_300: l2-cache {
                                compatible = "cache";
@@ -148,6 +156,8 @@
                        interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
                                         &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+                       power-domains = <&CPU_PD4>;
+                       power-domain-names = "psci";
                        #cooling-cells = <2>;
                        L2_400: l2-cache {
                                compatible = "cache";
@@ -170,6 +180,8 @@
                        interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
                                         &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+                       power-domains = <&CPU_PD5>;
+                       power-domain-names = "psci";
                        #cooling-cells = <2>;
                        L2_500: l2-cache {
                                compatible = "cache";
@@ -192,6 +204,8 @@
                        interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
                                         &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+                       power-domains = <&CPU_PD6>;
+                       power-domain-names = "psci";
                        #cooling-cells = <2>;
                        L2_600: l2-cache {
                                compatible = "cache";
@@ -214,6 +228,8 @@
                        interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
                                         &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+                       power-domains = <&CPU_PD7>;
+                       power-domain-names = "psci";
                        #cooling-cells = <2>;
                        L2_700: l2-cache {
                                compatible = "cache";
@@ -257,6 +273,76 @@
                                };
                        };
                };
+
+               domain-idle-states {
+                       CLUSTER_SLEEP_PC: cluster-sleep-0 {
+                               compatible = "domain-idle-state";
+                               arm,psci-suspend-param = <0x41000044>;
+                               entry-latency-us = <2752>;
+                               exit-latency-us = <3048>;
+                               min-residency-us = <6118>;
+                       };
+
+                       CLUSTER_SLEEP_CX_RET: cluster-sleep-1 {
+                               compatible = "domain-idle-state";
+                               arm,psci-suspend-param = <0x41001244>;
+                               entry-latency-us = <3638>;
+                               exit-latency-us = <4562>;
+                               min-residency-us = <8467>;
+                       };
+
+                       CLUSTER_AOSS_SLEEP: cluster-sleep-2 {
+                               compatible = "domain-idle-state";
+                               arm,psci-suspend-param = <0x4100b244>;
+                               entry-latency-us = <3263>;
+                               exit-latency-us = <6562>;
+                               min-residency-us = <9987>;
+                       };
+               };
+
+               cpu_idle_states: idle-states {
+                       entry-method = "psci";
+
+                       LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
+                               compatible = "arm,idle-state";
+                               idle-state-name = "little-power-collapse";
+                               arm,psci-suspend-param = <0x40000003>;
+                               entry-latency-us = <549>;
+                               exit-latency-us = <901>;
+                               min-residency-us = <1774>;
+                               local-timer-stop;
+                       };
+
+                       LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
+                               compatible = "arm,idle-state";
+                               idle-state-name = "little-rail-power-collapse";
+                               arm,psci-suspend-param = <0x40000004>;
+                               entry-latency-us = <702>;
+                               exit-latency-us = <915>;
+                               min-residency-us = <4001>;
+                               local-timer-stop;
+                       };
+
+                       BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
+                               compatible = "arm,idle-state";
+                               idle-state-name = "big-power-collapse";
+                               arm,psci-suspend-param = <0x40000003>;
+                               entry-latency-us = <523>;
+                               exit-latency-us = <1244>;
+                               min-residency-us = <2207>;
+                               local-timer-stop;
+                       };
+
+                       BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
+                               compatible = "arm,idle-state";
+                               idle-state-name = "big-rail-power-collapse";
+                               arm,psci-suspend-param = <0x40000004>;
+                               entry-latency-us = <526>;
+                               exit-latency-us = <1854>;
+                               min-residency-us = <5555>;
+                               local-timer-stop;
+                       };
+               };
        };
 
        firmware {
@@ -386,6 +472,61 @@
        psci {
                compatible = "arm,psci-1.0";
                method = "smc";
+
+               CPU_PD0: power-domain-cpu0 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+               };
+
+               CPU_PD1: power-domain-cpu1 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+               };
+
+               CPU_PD2: power-domain-cpu2 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+               };
+
+               CPU_PD3: power-domain-cpu3 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+               };
+
+               CPU_PD4: power-domain-cpu4 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+               };
+
+               CPU_PD5: power-domain-cpu5 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+               };
+
+               CPU_PD6: power-domain-cpu6 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
+               };
+
+               CPU_PD7: power-domain-cpu7 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
+               };
+
+               CLUSTER_PD: power-domain-cpu-cluster0 {
+                       #power-domain-cells = <0>;
+                       domain-idle-states = <&CLUSTER_SLEEP_PC
+                                             &CLUSTER_SLEEP_CX_RET
+                                             &CLUSTER_AOSS_SLEEP>;
+               };
        };
 
        reserved_memory: reserved-memory {