#define        DMA_ADDR_INVALID        (~(dma_addr_t)0)
 
-#define OMAP2_DMA_CH(ch)       (((ch) - 1) << 1)
-#define OMAP24XX_DMA(name, ch) (OMAP24XX_DMA_##name + OMAP2_DMA_CH(ch))
-
 /*
  * The OMAP UDC needs _very_ early endpoint setup:  before enabling the
  * D+ pullup to allow enumeration.  That's too early for the gadget
                                : OMAP_DMA_SYNC_ELEMENT;
        int             dma_trigger = 0;
 
-       if (cpu_is_omap24xx())
-               dma_trigger = OMAP24XX_DMA(USB_W2FC_TX0, ep->dma_channel);
-
        /* measure length in either bytes or packets */
        if ((cpu_is_omap16xx() && length <= UDC_TXN_TSC)
-                       || (cpu_is_omap24xx() && length < ep->maxpacket)
                        || (cpu_is_omap15xx() && length < ep->maxpacket)) {
                txdma_ctrl = UDC_TXN_EOT | length;
                omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
        int dma_trigger = 0;
        u16 w;
 
-       if (cpu_is_omap24xx())
-               dma_trigger = OMAP24XX_DMA(USB_W2FC_RX0, ep->dma_channel);
-
-       /* NOTE:  we filtered out "short reads" before, so we know
-        * the buffer has only whole numbers of packets.
-        * except MODE SELECT(6) sent the 24 bytes data in OMAP24XX DMA mode
-        */
-       if (cpu_is_omap24xx() && packets < ep->maxpacket) {
-               omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
-                               packets, 1, OMAP_DMA_SYNC_ELEMENT,
-                               dma_trigger, 0);
-               req->dma_bytes = packets;
-       } else {
-               /* set up this DMA transfer, enable the fifo, start */
-               packets /= ep->ep.maxpacket;
-               packets = min(packets, (unsigned)UDC_RXN_TC + 1);
-               req->dma_bytes = packets * ep->ep.maxpacket;
-               omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S16,
-                               ep->ep.maxpacket >> 1, packets,
-                               OMAP_DMA_SYNC_ELEMENT,
-                               dma_trigger, 0);
-       }
+       /* set up this DMA transfer, enable the fifo, start */
+       packets /= ep->ep.maxpacket;
+       packets = min(packets, (unsigned)UDC_RXN_TC + 1);
+       req->dma_bytes = packets * ep->ep.maxpacket;
+       omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S16,
+                       ep->ep.maxpacket >> 1, packets,
+                       OMAP_DMA_SYNC_ELEMENT,
+                       dma_trigger, 0);
        omap_set_dma_dest_params(ep->lch, OMAP_DMA_PORT_EMIFF,
                OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual,
                0, 0);
        ep->dma_channel = channel;
 
        if (is_in) {
-               if (cpu_is_omap24xx())
-                       dma_channel = OMAP24XX_DMA(USB_W2FC_TX0, channel);
-               else
-                       dma_channel = OMAP_DMA_USB_W2FC_TX0 - 1 + channel;
+               dma_channel = OMAP_DMA_USB_W2FC_TX0 - 1 + channel;
                status = omap_request_dma(dma_channel,
                        ep->ep.name, dma_error, ep, &ep->lch);
                if (status == 0) {
                                0, 0);
                }
        } else {
-               if (cpu_is_omap24xx())
-                       dma_channel = OMAP24XX_DMA(USB_W2FC_RX0, channel);
-               else
-                       dma_channel = OMAP_DMA_USB_W2FC_RX0 - 1 + channel;
-
+               dma_channel = OMAP_DMA_USB_W2FC_RX0 - 1 + channel;
                status = omap_request_dma(dma_channel,
                        ep->ep.name, dma_error, ep, &ep->lch);
                if (status == 0) {
                omap_disable_dma_irq(ep->lch, OMAP_DMA_BLOCK_IRQ);
 
                /* channel type P: hw synch (fifo) */
-               if (cpu_class_is_omap1() && !cpu_is_omap15xx())
+               if (!cpu_is_omap15xx())
                        omap_set_dma_channel_mode(ep->lch, OMAP_DMA_LCH_P);
        }
 
 
        /* this isn't bogus, but OMAP DMA isn't the only hardware to
         * have a hard time with partial packet reads...  reject it.
-        * Except OMAP2 can handle the small packets.
         */
        if (use_dma
                        && ep->has_dma
                        && ep->bEndpointAddress != 0
                        && (ep->bEndpointAddress & USB_DIR_IN) == 0
-                       && !cpu_class_is_omap2()
                        && (req->req.length % ep->ep.maxpacket) != 0) {
                DBG("%s, no partial packet OUT reads\n", __func__);
                return -EMSGSIZE;
 {
        return (machine_is_omap_innovator()
                || machine_is_omap_osk()
-               || machine_is_omap_apollon()
-#ifndef CONFIG_MACH_OMAP_H4_OTG
-               || machine_is_omap_h4()
-#endif
                || machine_is_sx1()
                || cpu_is_omap7xx() /* No known omap7xx boards with vbus sense */
                );
        u32             trans = 0;
        char            *ctrl_name = "(UNKNOWN)";
 
-       /* XXX This needs major revision for OMAP2+ */
        tmp = omap_readl(OTG_REV);
-       if (cpu_class_is_omap1()) {
-               ctrl_name = "tranceiver_ctrl";
-               trans = omap_readw(USB_TRANSCEIVER_CTRL);
-       }
+       ctrl_name = "tranceiver_ctrl";
+       trans = omap_readw(USB_TRANSCEIVER_CTRL);
        seq_printf(s, "\nOTG rev %d.%d, %s %05x\n",
                tmp >> 4, tmp & 0xf, ctrl_name, trans);
        tmp = omap_readw(OTG_SYSCON_1);
                HMC,
                udc->transceiver
                        ? udc->transceiver->label
-                       : ((cpu_is_omap1710() || cpu_is_omap24xx())
+                       : (cpu_is_omap1710()
                                ? "external" : "(none)"));
-       if (cpu_class_is_omap1()) {
-               seq_printf(s, "ULPD control %04x req %04x status %04x\n",
-                       omap_readw(ULPD_CLOCK_CTRL),
-                       omap_readw(ULPD_SOFT_REQ),
-                       omap_readw(ULPD_STATUS_REQ));
-       }
+       seq_printf(s, "ULPD control %04x req %04x status %04x\n",
+               omap_readw(ULPD_CLOCK_CTRL),
+               omap_readw(ULPD_SOFT_REQ),
+               omap_readw(ULPD_STATUS_REQ));
 
        /* OTG controller registers */
        if (!cpu_is_omap15xx())
                 * and ignored for PIO-IN on newer chips
                 * (for more reliable behavior)
                 */
-               if (!use_dma || cpu_is_omap15xx() || cpu_is_omap24xx())
+               if (!use_dma || cpu_is_omap15xx())
                        dbuf = 0;
 
                switch (maxp) {
        struct usb_phy          *xceiv = NULL;
        const char              *type = NULL;
        struct omap_usb_config  *config = pdev->dev.platform_data;
-       struct clk              *dc_clk;
-       struct clk              *hhc_clk;
+       struct clk              *dc_clk = NULL;
+       struct clk              *hhc_clk = NULL;
 
        /* NOTE:  "knows" the order of the resources! */
        if (!request_mem_region(pdev->resource[0].start,
                udelay(100);
        }
 
-       if (cpu_is_omap24xx()) {
-               dc_clk = clk_get(&pdev->dev, "usb_fck");
-               hhc_clk = clk_get(&pdev->dev, "usb_l4_ick");
-               BUG_ON(IS_ERR(dc_clk) || IS_ERR(hhc_clk));
-               /* can't use omap_udc_enable_clock yet */
-               clk_enable(dc_clk);
-               clk_enable(hhc_clk);
-               udelay(100);
-       }
-
        if (cpu_is_omap7xx()) {
                dc_clk = clk_get(&pdev->dev, "usb_dc_ck");
                hhc_clk = clk_get(&pdev->dev, "l3_ocpi_ck");
 
                hmc = HMC_1610;
 
-               if (cpu_is_omap24xx()) {
-                       /* this could be transceiverless in one of the
-                        * "we don't need to know" modes.
-                        */
-                       type = "external";
-                       goto known;
-               }
-
                switch (hmc) {
                case 0:                 /* POWERUP DEFAULT == 0 */
                case 4:
                        goto cleanup0;
                }
        }
-known:
+
        INFO("hmc mode %d, %s transceiver\n", hmc, type);
 
        /* a "gadget" abstracts/virtualizes the controller */
                clk_disable(dc_clk);
        }
 
-       if (cpu_is_omap24xx()) {
-               udc->dc_clk = dc_clk;
-               udc->hhc_clk = hhc_clk;
-               /* FIXME OMAP2 don't release hhc & dc clock */
-#if 0
-               clk_disable(hhc_clk);
-               clk_disable(dc_clk);
-#endif
-       }
-
        create_proc_file();
        status = device_add(&udc->gadget.dev);
        if (status)
        if (xceiv)
                usb_put_transceiver(xceiv);
 
-       if (cpu_is_omap16xx() || cpu_is_omap24xx() || cpu_is_omap7xx()) {
+       if (cpu_is_omap16xx() || cpu_is_omap7xx()) {
                clk_disable(hhc_clk);
                clk_disable(dc_clk);
                clk_put(hhc_clk);