drm/i915: move dpll_funcs to display.funcs

Move display dpll functions under drm_i915_private display sub-struct.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/5bf7aada2c7f0500c5002fa089fb66a92019a301.1661346845.git.jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index c185ab0428f87319991e7397fc52da93f7941ae5..f62b184770785aea621b6ae153ed20c74475e703 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -12,6 +12,7 @@ struct intel_atomic_state;
 struct intel_cdclk_funcs;
 struct intel_crtc;
 struct intel_crtc_state;
+struct intel_dpll_funcs;
 struct intel_initial_plane_config;
 
 struct intel_display_funcs {
@@ -38,6 +39,9 @@ struct intel_display {
 
                /* Display CDCLK functions */
                const struct intel_cdclk_funcs *cdclk;
+
+               /* Display pll funcs */
+               const struct intel_dpll_funcs *dpll;
        } funcs;
 };
 

diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index 5262f16b45acfd5d9eef11c5c63f4b44d7eea7a5..87899702a52297d9917a9e77112095a2a14e3d2b 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -1420,7 +1420,7 @@ int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state,
        if (!crtc_state->hw.enable)
                return 0;
 
-       ret = i915->dpll_funcs->crtc_compute_clock(state, crtc);
+       ret = i915->display.funcs.dpll->crtc_compute_clock(state, crtc);
        if (ret) {
                drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] Couldn't calculate DPLL settings\n",
                            crtc->base.base.id, crtc->base.name);
@@ -1446,10 +1446,10 @@ int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state,
        if (!crtc_state->hw.enable)
                return 0;
 
-       if (!i915->dpll_funcs->crtc_get_shared_dpll)
+       if (!i915->display.funcs.dpll->crtc_get_shared_dpll)
                return 0;
 
-       ret = i915->dpll_funcs->crtc_get_shared_dpll(state, crtc);
+       ret = i915->display.funcs.dpll->crtc_get_shared_dpll(state, crtc);
        if (ret) {
                drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] Couldn't get a shared DPLL\n",
                            crtc->base.base.id, crtc->base.name);
@@ -1463,23 +1463,23 @@ void
 intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv)
 {
        if (IS_DG2(dev_priv))
-               dev_priv->dpll_funcs = &dg2_dpll_funcs;
+               dev_priv->display.funcs.dpll = &dg2_dpll_funcs;
        else if (DISPLAY_VER(dev_priv) >= 9 || HAS_DDI(dev_priv))
-               dev_priv->dpll_funcs = &hsw_dpll_funcs;
+               dev_priv->display.funcs.dpll = &hsw_dpll_funcs;
        else if (HAS_PCH_SPLIT(dev_priv))
-               dev_priv->dpll_funcs = &ilk_dpll_funcs;
+               dev_priv->display.funcs.dpll = &ilk_dpll_funcs;
        else if (IS_CHERRYVIEW(dev_priv))
-               dev_priv->dpll_funcs = &chv_dpll_funcs;
+               dev_priv->display.funcs.dpll = &chv_dpll_funcs;
        else if (IS_VALLEYVIEW(dev_priv))
-               dev_priv->dpll_funcs = &vlv_dpll_funcs;
+               dev_priv->display.funcs.dpll = &vlv_dpll_funcs;
        else if (IS_G4X(dev_priv))
-               dev_priv->dpll_funcs = &g4x_dpll_funcs;
+               dev_priv->display.funcs.dpll = &g4x_dpll_funcs;
        else if (IS_PINEVIEW(dev_priv))
-               dev_priv->dpll_funcs = &pnv_dpll_funcs;
+               dev_priv->display.funcs.dpll = &pnv_dpll_funcs;
        else if (DISPLAY_VER(dev_priv) != 2)
-               dev_priv->dpll_funcs = &i9xx_dpll_funcs;
+               dev_priv->display.funcs.dpll = &i9xx_dpll_funcs;
        else
-               dev_priv->dpll_funcs = &i8xx_dpll_funcs;
+               dev_priv->display.funcs.dpll = &i8xx_dpll_funcs;
 }
 
 static bool i9xx_has_pps(struct drm_i915_private *dev_priv)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 60df75946bfe5f8665f44f87e7119befca4c982e..ea01fdd8126205b1b9224337321a428ff025dc38 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -90,7 +90,6 @@ struct intel_color_funcs;
 struct intel_connector;
 struct intel_crtc;
 struct intel_dp;
-struct intel_dpll_funcs;
 struct intel_encoder;
 struct intel_fbdev;
 struct intel_fdi_funcs;
@@ -516,9 +515,6 @@ struct drm_i915_private {
        /* fdi display functions */
        const struct intel_fdi_funcs *fdi_funcs;
 
-       /* display pll funcs */
-       const struct intel_dpll_funcs *dpll_funcs;
-
        /* Display internal color functions */
        const struct intel_color_funcs *color_funcs;