priv->abyBBVGA[1] = 0x0A;
priv->abyBBVGA[2] = 0x0;
priv->abyBBVGA[3] = 0x0;
- priv->ldBmThreshold[0] = -70;
- priv->ldBmThreshold[1] = -50;
- priv->ldBmThreshold[2] = 0;
- priv->ldBmThreshold[3] = 0;
+ priv->dbm_threshold[0] = -70;
+ priv->dbm_threshold[1] = -50;
+ priv->dbm_threshold[2] = 0;
+ priv->dbm_threshold[3] = 0;
} else if ((by_rf_type == RF_AIROHA) || (by_rf_type == RF_AL2230S)) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
result &= bb_write_embedded(priv,
priv->abyBBVGA[1] = 0x10;
priv->abyBBVGA[2] = 0x0;
priv->abyBBVGA[3] = 0x0;
- priv->ldBmThreshold[0] = -70;
- priv->ldBmThreshold[1] = -48;
- priv->ldBmThreshold[2] = 0;
- priv->ldBmThreshold[3] = 0;
+ priv->dbm_threshold[0] = -70;
+ priv->dbm_threshold[1] = -48;
+ priv->dbm_threshold[2] = 0;
+ priv->dbm_threshold[3] = 0;
} else if (by_rf_type == RF_UW2451) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
result &= bb_write_embedded(priv,
priv->abyBBVGA[1] = 0x0A;
priv->abyBBVGA[2] = 0x0;
priv->abyBBVGA[3] = 0x0;
- priv->ldBmThreshold[0] = -60;
- priv->ldBmThreshold[1] = -50;
- priv->ldBmThreshold[2] = 0;
- priv->ldBmThreshold[3] = 0;
+ priv->dbm_threshold[0] = -60;
+ priv->dbm_threshold[1] = -50;
+ priv->dbm_threshold[2] = 0;
+ priv->dbm_threshold[3] = 0;
} else if (by_rf_type == RF_UW2452) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
result &= bb_write_embedded(priv,
priv->abyBBVGA[1] = 0x0A;
priv->abyBBVGA[2] = 0x0;
priv->abyBBVGA[3] = 0x0;
- priv->ldBmThreshold[0] = -60;
- priv->ldBmThreshold[1] = -50;
- priv->ldBmThreshold[2] = 0;
- priv->ldBmThreshold[3] = 0;
+ priv->dbm_threshold[0] = -60;
+ priv->dbm_threshold[1] = -50;
+ priv->dbm_threshold[2] = 0;
+ priv->dbm_threshold[3] = 0;
/* }} RobertYu */
} else if (by_rf_type == RF_VT3226) {
priv->abyBBVGA[1] = 0x10;
priv->abyBBVGA[2] = 0x0;
priv->abyBBVGA[3] = 0x0;
- priv->ldBmThreshold[0] = -70;
- priv->ldBmThreshold[1] = -48;
- priv->ldBmThreshold[2] = 0;
- priv->ldBmThreshold[3] = 0;
+ priv->dbm_threshold[0] = -70;
+ priv->dbm_threshold[1] = -48;
+ priv->dbm_threshold[2] = 0;
+ priv->dbm_threshold[3] = 0;
/* Fix VT3226 DFC system timing issue */
MACvSetRFLE_LatchBase(iobase);
/* {{ RobertYu: 20050104 */
priv->abyBBVGA[1] = 0x10;
priv->abyBBVGA[2] = 0x0;
priv->abyBBVGA[3] = 0x0;
- priv->ldBmThreshold[0] = -70;
- priv->ldBmThreshold[1] = -48;
- priv->ldBmThreshold[2] = 0;
- priv->ldBmThreshold[3] = 0;
+ priv->dbm_threshold[0] = -70;
+ priv->dbm_threshold[1] = -48;
+ priv->dbm_threshold[2] = 0;
+ priv->dbm_threshold[3] = 0;
/* }} RobertYu */
} else {
/* No VGA Table now */