arm64: dts: qcom: Fix 'reg-names' for sdhci nodes

Since the Qualcomm sdhci-msm device-tree binding has been converted
to yaml format, 'make dtbs_check' reports a number of issues with
ordering of 'reg-names' as various possible combinations
are possible for different qcom SoC dts files.

Fix the same by updating the offending 'dts' files.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220514215424.1007718-6-bhupesh.sharma@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index badfd934fdb5d0651ce95aed2e56cd1ab47d1d2f..aea956e3d5f8bee2d903feea4403fa797fac98dd 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -809,7 +809,7 @@
                sdcc1: mmc@7804000 {
                        compatible = "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5";
                        reg = <0x07804000 0x1000>, <0x7805000 0x1000>;
-                       reg-names = "hc", "cqhci";
+                       reg-names = "hc_mem", "cqe_mem";
 
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 8dae9cd067e4fcee33e88e8d50a8cfca032ff36a..d9d3e117866705bd29bd77e01ece08dad35accd6 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -697,7 +697,7 @@
                        compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
                        reg = <0 0x7c4000 0 0x1000>,
                                <0 0x07c5000 0 0x1000>;
-                       reg-names = "hc", "cqhci";
+                       reg-names = "hc_mem", "cqe_mem";
 
                        iommus = <&apps_smmu 0x60 0x0>;
                        interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>,

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 0a116e195be91c97d9a838cb7d5164665d3a4292..f336704f3ecc7560dbc91303f613c6bcc7ab6298 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -866,7 +866,7 @@
 
                        reg = <0 0x007c4000 0 0x1000>,
                              <0 0x007c5000 0 0x1000>;
-                       reg-names = "hc", "cqhci";
+                       reg-names = "hc_mem", "cqe_mem";
 
                        iommus = <&apps_smmu 0xc0 0x0>;
                        interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH>,

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 17ef35e72fc96ef565e5bef5866df17c33f3bb2e..ed0ae1cecbba10ca12e5d6e8cd737f8d310f339a 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1280,7 +1280,7 @@
                sdhc_2: mmc@c084000 {
                        compatible = "qcom,sdm630-sdhci", "qcom,sdhci-msm-v5";
                        reg = <0x0c084000 0x1000>;
-                       reg-names = "hc";
+                       reg-names = "hc_mem";
 
                        interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
                                        <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
@@ -1335,7 +1335,7 @@
                        reg = <0x0c0c4000 0x1000>,
                              <0x0c0c5000 0x1000>,
                              <0x0c0c8000 0x8000>;
-                       reg-names = "hc", "cqhci", "ice";
+                       reg-names = "hc_mem", "cqe_mem", "ice_mem";
 
                        interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
                                        <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index 77bff81af43357ae3003d4006f3486857f236c8c..94e427abbfd2def4f75e6e4dbee6de1badd21e53 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -438,7 +438,7 @@
                sdhc_1: mmc@4744000 {
                        compatible = "qcom,sm6125-sdhci", "qcom,sdhci-msm-v5";
                        reg = <0x04744000 0x1000>, <0x04745000 0x1000>;
-                       reg-names = "hc", "core";
+                       reg-names = "hc_mem", "core_mem";
 
                        interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
@@ -459,7 +459,7 @@
                sdhc_2: mmc@4784000 {
                        compatible = "qcom,sm6125-sdhci", "qcom,sdhci-msm-v5";
                        reg = <0x04784000 0x1000>;
-                       reg-names = "hc";
+                       reg-names = "hc_mem";
 
                        interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index bb9349bc2d353a6ccc202b460edd1809c928e082..c702235f029154f85001229b9f4b328b79983689 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -477,7 +477,7 @@
                        reg = <0 0x007c4000 0 0x1000>,
                                <0 0x007c5000 0 0x1000>,
                                <0 0x007c8000 0 0x8000>;
-                       reg-names = "hc", "cqhci", "ice";
+                       reg-names = "hc_mem", "cqe_mem", "ice_mem";
 
                        interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH>;