drm/i915/mtl: Add PCH support

Add support for Meteorpoint(MTP) PCH used with Meteorlake.

Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220818234202.451742-7-radhakrishna.sripada@intel.com

diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c
index 0fec25be146a2462401b914ddf75d3a3cb0b748e..ba9843cb1b13d8c963c87f07c527c7f530ad3d8e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pch.c
+++ b/drivers/gpu/drm/i915/intel_pch.c
@@ -138,6 +138,11 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
                drm_WARN_ON(&dev_priv->drm, !IS_ALDERLAKE_S(dev_priv) &&
                            !IS_ALDERLAKE_P(dev_priv));
                return PCH_ADP;
+       case INTEL_PCH_MTP_DEVICE_ID_TYPE:
+       case INTEL_PCH_MTP2_DEVICE_ID_TYPE:
+               drm_dbg_kms(&dev_priv->drm, "Found Meteor Lake PCH\n");
+               drm_WARN_ON(&dev_priv->drm, !IS_METEORLAKE(dev_priv));
+               return PCH_MTP;
        default:
                return PCH_NONE;
        }
@@ -166,7 +171,9 @@ intel_virt_detect_pch(const struct drm_i915_private *dev_priv,
         * make an educated guess as to which PCH is really there.
         */
 
-       if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv))
+       if (IS_METEORLAKE(dev_priv))
+               id = INTEL_PCH_MTP_DEVICE_ID_TYPE;
+       else if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv))
                id = INTEL_PCH_ADP_DEVICE_ID_TYPE;
        else if (IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv))
                id = INTEL_PCH_TGP_DEVICE_ID_TYPE;

diff --git a/drivers/gpu/drm/i915/intel_pch.h b/drivers/gpu/drm/i915/intel_pch.h
index 7c8ce9781d1a21d889a915194c51f43a9a01e68b..32aff5a70d04e069024b3d6e429efcae89a62bb6 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pch.h
+++ b/drivers/gpu/drm/i915/intel_pch.h
@@ -25,6 +25,7 @@ enum intel_pch {
        PCH_ICP,        /* Ice Lake/Jasper Lake PCH */
        PCH_TGP,        /* Tiger Lake/Mule Creek Canyon PCH */
        PCH_ADP,        /* Alder Lake PCH */
+       PCH_MTP,        /* Meteor Lake PCH */
 
        /* Fake PCHs, functionality handled on the same PCI dev */
        PCH_DG1 = 1024,
@@ -57,12 +58,15 @@ enum intel_pch {
 #define INTEL_PCH_ADP2_DEVICE_ID_TYPE          0x5180
 #define INTEL_PCH_ADP3_DEVICE_ID_TYPE          0x7A00
 #define INTEL_PCH_ADP4_DEVICE_ID_TYPE          0x5480
+#define INTEL_PCH_MTP_DEVICE_ID_TYPE           0x7E00
+#define INTEL_PCH_MTP2_DEVICE_ID_TYPE          0xAE00
 #define INTEL_PCH_P2X_DEVICE_ID_TYPE           0x7100
 #define INTEL_PCH_P3X_DEVICE_ID_TYPE           0x7000
 #define INTEL_PCH_QEMU_DEVICE_ID_TYPE          0x2900 /* qemu q35 has 2918 */
 
 #define INTEL_PCH_TYPE(dev_priv)               ((dev_priv)->pch_type)
 #define INTEL_PCH_ID(dev_priv)                 ((dev_priv)->pch_id)
+#define HAS_PCH_MTP(dev_priv)                  (INTEL_PCH_TYPE(dev_priv) == PCH_MTP)
 #define HAS_PCH_DG2(dev_priv)                  (INTEL_PCH_TYPE(dev_priv) == PCH_DG2)
 #define HAS_PCH_ADP(dev_priv)                  (INTEL_PCH_TYPE(dev_priv) == PCH_ADP)
 #define HAS_PCH_DG1(dev_priv)                  (INTEL_PCH_TYPE(dev_priv) == PCH_DG1)