media: hantro: add support for STM32MP25 VENC
authorHugues Fruchet <hugues.fruchet@foss.st.com>
Wed, 10 Jan 2024 10:46:40 +0000 (11:46 +0100)
committerMauro Carvalho Chehab <mchehab@kernel.org>
Thu, 1 Feb 2024 10:12:04 +0000 (11:12 +0100)
Add support for STM32MP25 VENC video hardware encoder.
Support of JPEG encoding.
VENC has its own reset/clock/irq.

Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
drivers/media/platform/verisilicon/hantro_drv.c
drivers/media/platform/verisilicon/hantro_hw.h
drivers/media/platform/verisilicon/stm32mp25_vpu_hw.c

index fe8e2240324cb667af7f43fe656683a525fc53b4..34b123dafd890b0d1c5a9e1e4ee4d613e6c25017 100644 (file)
@@ -738,6 +738,7 @@ static const struct of_device_id of_hantro_match[] = {
 #endif
 #ifdef CONFIG_VIDEO_HANTRO_STM32MP25
        { .compatible = "st,stm32mp25-vdec", .data = &stm32mp25_vdec_variant, },
+       { .compatible = "st,stm32mp25-venc", .data = &stm32mp25_venc_variant, },
 #endif
        { /* sentinel */ }
 };
index 0b4806f6763097a70417a8a94a48607cbe336537..7737320cc8cc622dc857facaa24a9bb78ce1101e 100644 (file)
@@ -409,6 +409,7 @@ extern const struct hantro_variant rk3588_vpu981_variant;
 extern const struct hantro_variant sama5d4_vdec_variant;
 extern const struct hantro_variant sunxi_vpu_variant;
 extern const struct hantro_variant stm32mp25_vdec_variant;
+extern const struct hantro_variant stm32mp25_venc_variant;
 
 extern const struct hantro_postproc_ops hantro_g1_postproc_ops;
 extern const struct hantro_postproc_ops hantro_g2_postproc_ops;
index 6af6edcb66503e343711ee31954182cb57a077b6..833821120b2016e35d5741661550fe598296dc53 100644 (file)
@@ -9,6 +9,8 @@
  */
 
 #include "hantro.h"
+#include "hantro_jpeg.h"
+#include "hantro_h1_regs.h"
 
 /*
  * Supported formats.
@@ -55,6 +57,67 @@ static const struct hantro_fmt stm32mp25_vdec_fmts[] = {
        },
 };
 
+static const struct hantro_fmt stm32mp25_venc_fmts[] = {
+       {
+               .fourcc = V4L2_PIX_FMT_YUV420M,
+               .codec_mode = HANTRO_MODE_NONE,
+               .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUV420P,
+       },
+       {
+               .fourcc = V4L2_PIX_FMT_NV12M,
+               .codec_mode = HANTRO_MODE_NONE,
+               .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUV420SP,
+       },
+       {
+               .fourcc = V4L2_PIX_FMT_YUYV,
+               .codec_mode = HANTRO_MODE_NONE,
+               .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUYV422,
+       },
+       {
+               .fourcc = V4L2_PIX_FMT_UYVY,
+               .codec_mode = HANTRO_MODE_NONE,
+               .enc_fmt = ROCKCHIP_VPU_ENC_FMT_UYVY422,
+       },
+       {
+               .fourcc = V4L2_PIX_FMT_JPEG,
+               .codec_mode = HANTRO_MODE_JPEG_ENC,
+               .max_depth = 2,
+               .header_size = JPEG_HEADER_SIZE,
+               .frmsize = {
+                       .min_width = 96,
+                       .max_width = FMT_4K_WIDTH,
+                       .step_width = MB_DIM,
+                       .min_height = 96,
+                       .max_height = FMT_4K_HEIGHT,
+                       .step_height = MB_DIM,
+               },
+       },
+};
+
+static irqreturn_t stm32mp25_venc_irq(int irq, void *dev_id)
+{
+       struct hantro_dev *vpu = dev_id;
+       enum vb2_buffer_state state;
+       u32 status;
+
+       status = vepu_read(vpu, H1_REG_INTERRUPT);
+       state = (status & H1_REG_INTERRUPT_FRAME_RDY) ?
+               VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
+
+       vepu_write(vpu, H1_REG_INTERRUPT_BIT, H1_REG_INTERRUPT);
+
+       hantro_irq_done(vpu, state);
+
+       return IRQ_HANDLED;
+}
+
+static void stm32mp25_venc_reset(struct hantro_ctx *ctx)
+{
+       struct hantro_dev *vpu = ctx->dev;
+
+       reset_control_reset(vpu->resets);
+}
+
 /*
  * Supported codec ops.
  */
@@ -74,6 +137,14 @@ static const struct hantro_codec_ops stm32mp25_vdec_codec_ops[] = {
        },
 };
 
+static const struct hantro_codec_ops stm32mp25_venc_codec_ops[] = {
+       [HANTRO_MODE_JPEG_ENC] = {
+               .run = hantro_h1_jpeg_enc_run,
+               .reset = stm32mp25_venc_reset,
+               .done = hantro_h1_jpeg_enc_done,
+       },
+};
+
 /*
  * Variants.
  */
@@ -94,3 +165,22 @@ const struct hantro_variant stm32mp25_vdec_variant = {
        .clk_names = stm32mp25_vdec_clk_names,
        .num_clocks = ARRAY_SIZE(stm32mp25_vdec_clk_names),
 };
+
+static const struct hantro_irq stm32mp25_venc_irqs[] = {
+       { "venc", stm32mp25_venc_irq },
+};
+
+static const char * const stm32mp25_venc_clk_names[] = {
+       "venc-clk"
+};
+
+const struct hantro_variant stm32mp25_venc_variant = {
+       .enc_fmts = stm32mp25_venc_fmts,
+       .num_enc_fmts = ARRAY_SIZE(stm32mp25_venc_fmts),
+       .codec = HANTRO_JPEG_ENCODER,
+       .codec_ops = stm32mp25_venc_codec_ops,
+       .irqs = stm32mp25_venc_irqs,
+       .num_irqs = ARRAY_SIZE(stm32mp25_venc_irqs),
+       .clk_names = stm32mp25_venc_clk_names,
+       .num_clocks = ARRAY_SIZE(stm32mp25_venc_clk_names)
+};