clk: imx: scu: add parallel port clock ops
authorGuoniu.zhou <guoniu.zhou@nxp.com>
Fri, 4 Jun 2021 09:09:35 +0000 (17:09 +0800)
committerAbel Vesa <abel.vesa@nxp.com>
Mon, 14 Jun 2021 09:34:14 +0000 (12:34 +0300)
Because digital pll for parallel interface is on by default, and
not provide enable/disable function by scu, so add the related ops
for this kind of clocks.

Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
drivers/clk/imx/clk-scu.c

index f4efb3b76c86ee04fc29595b80336886ea19287c..680b2650fd4501f3f5d11f29a87f5cbc672499dc 100644 (file)
@@ -425,6 +425,12 @@ static const struct clk_ops clk_scu_cpu_ops = {
        .unprepare = clk_scu_unprepare,
 };
 
+static const struct clk_ops clk_scu_pi_ops = {
+       .recalc_rate = clk_scu_recalc_rate,
+       .round_rate  = clk_scu_round_rate,
+       .set_rate    = clk_scu_set_rate,
+};
+
 struct clk_hw *__imx_clk_scu(struct device *dev, const char *name,
                             const char * const *parents, int num_parents,
                             u32 rsrc_id, u8 clk_type)
@@ -445,6 +451,8 @@ struct clk_hw *__imx_clk_scu(struct device *dev, const char *name,
        init.ops = &clk_scu_ops;
        if (rsrc_id == IMX_SC_R_A35)
                init.ops = &clk_scu_cpu_ops;
+       else if (rsrc_id == IMX_SC_R_PI_0_PLL)
+               init.ops = &clk_scu_pi_ops;
        else
                init.ops = &clk_scu_ops;
        init.parent_names = parents;