ARM: dts: omap4-embt2ws: enable 32K clock on WLAN
authorAndreas Kemnade <andreas@kemnade.info>
Sat, 16 Sep 2023 10:05:15 +0000 (12:05 +0200)
committerTony Lindgren <tony@atomide.com>
Thu, 30 Nov 2023 12:11:27 +0000 (14:11 +0200)
WLAN did only work if clock was left enabled by the original system,
so make it fully enable the needed resources itself.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Message-ID: <20230916100515.1650336-6-andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts

index 01d783826d5fca3243216f82f0319caf12aebd85..0411adbe0dcb93c2e2b2823c2859840927a46846 100644 (file)
                regulator-name = "unknown";
        };
 
+       wl12xx_pwrseq: wl12xx-pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               clocks = <&twl 1>;
+               clock-names = "ext_clock";
+       };
+
        /* regulator for wl12xx on sdio2 */
        wl12xx_vmmc: wl12xx-vmmc {
                pinctrl-names = "default";
@@ -74,6 +80,7 @@
        twl: pmic@48 {
                compatible = "ti,twl6032";
                reg = <0x48>;
+               #clock-cells = <1>;
                /* IRQ# = 7 */
                interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
                interrupt-controller;
        pinctrl-names = "default";
        pinctrl-0 = <&wl12xx_pins>;
        vmmc-supply = <&wl12xx_vmmc>;
+       mmc-pwrseq = <&wl12xx_pwrseq>;
        interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
                               &omap4_pmx_core 0x12e>;
        non-removable;