BFA_FLASH_READ_STATUS = 0x05, /* read status */
};
-/**
- * @brief hardware error definition
+/*
+ * Hardware error definition
*/
enum bfa_flash_err {
BFA_FLASH_NOT_PRESENT = -1, /*!< flash not present */
BFA_FLASH_ERR_LEN = -9, /*!< invalid length */
};
-/**
- * @brief flash command register data structure
+/*
+ * Flash command register data structure
*/
union bfa_flash_cmd_reg_u {
struct {
u32 i;
};
-/**
- * @brief flash device status register data structure
+/*
+ * Flash device status register data structure
*/
union bfa_flash_dev_status_reg_u {
struct {
u32 i;
};
-/**
- * @brief flash address register data structure
+/*
+ * Flash address register data structure
*/
union bfa_flash_addr_reg_u {
struct {
u32 i;
};
-/**
+/*
* dg flash_raw_private Flash raw private functions
*/
static void
return 0;
}
-/**
+/*
* @brief
* Flush FLI data fifo.
*
return 0;
}
-/**
+/*
* @brief
* Read flash status.
*
return ret_status;
}
-/**
+/*
* @brief
* Start flash read operation.
*
return 0;
}
-/**
+/*
* @brief
* Check flash read operation.
*
return 0;
}
-/**
+/*
* @brief
* End flash read operation.
*
bfa_flash_fifo_flush(pci_bar);
}
-/**
+/*
* @brief
* Perform flash raw read.
*