drm/amd/display: Read before writing Backlight Mode Set Register
authorIswara Nagulendran <iswara.nagulendran@amd.com>
Fri, 29 Sep 2023 15:20:46 +0000 (11:20 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 26 Oct 2023 23:02:22 +0000 (19:02 -0400)
[HOW&WHY]
Reading the value from
DP_EDP_BACKLIGHT_MODE_SET_REGISTER, DPCD 0x721
before setting the
BP_EDP_PANEL_LUMINANC_CONTROL_ENABLE bit
to ensure there are no accidental overwrites.

Reviewed-by: Sreeja Golui <sreeja.golui@amd.com>
Reviewed-by: Harry Vanzylldejong <harry.vanzylldejong@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Iswara Nagulendran <iswara.nagulendran@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

index 86f97ddcc5954cbb58ff0051f8c4d88129b078c0..e32a7974a4bc68c1dcf5767d805a6c66ecf97772 100644 (file)
@@ -182,7 +182,7 @@ bool edp_set_backlight_level_nits(struct dc_link *link,
                        &backlight_control, 1) != DC_OK)
                        return false;
        } else {
-               const uint8_t backlight_enable = DP_EDP_PANEL_LUMINANCE_CONTROL_ENABLE;
+               uint8_t backlight_enable = 0;
                struct target_luminance_value *target_luminance = NULL;
 
                //if target luminance value is greater than 24 bits, clip the value to 24 bits
@@ -191,6 +191,11 @@ bool edp_set_backlight_level_nits(struct dc_link *link,
 
                target_luminance = (struct target_luminance_value *)&backlight_millinits;
 
+               core_link_read_dpcd(link, DP_EDP_BACKLIGHT_MODE_SET_REGISTER,
+                       &backlight_enable, sizeof(uint8_t));
+
+               backlight_enable |= DP_EDP_PANEL_LUMINANCE_CONTROL_ENABLE;
+
                if (core_link_write_dpcd(link, DP_EDP_BACKLIGHT_MODE_SET_REGISTER,
                        &backlight_enable,
                        sizeof(backlight_enable)) != DC_OK)