ARM: dts: aspeed: rainier: Add CFAM reset GPIO

The GPIO on Q0 is used for resetting the CFAM of the processor that the
ASPEED master is connected to.

The signal is wired as active high on the first pass systems.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index ac7cc96a15d3e1ca3f394f7c81a6eb6788e1d84e..e91f3bc7a0c27c1391400b8ce9936995f6c7ad35 100644 (file)
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -125,6 +125,12 @@
        #address-cells = <2>;
        #size-cells = <0>;
 
+       /*
+        * CFAM Reset is supposed to be active low but pass1 hardware is wired
+        * active high.
+        */
+       cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
+
        cfam@0,0 {
                reg = <0 0>;
                #address-cells = <1>;