ARM: dts: imx6qdl-mba6: Move pinmux to regulator node

GPIO2_IO00 is used by reg_pcie, move the pinmuxing to this node as well.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6qdl-mba6.dtsi b/arch/arm/boot/dts/imx6qdl-mba6.dtsi
index 9aacc1a621897e082688d2b736d2d020cb649daf..f4dca20669d6b7f005863df67f29745906053f7f 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-mba6.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-mba6.dtsi
@@ -86,6 +86,8 @@
 
        reg_pcie: regulator-pcie {
                compatible = "regulator-fixed";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_regpcie>;
                regulator-name = "supply-pcie";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
@@ -436,8 +438,6 @@
                        MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x001b0f0 /* #PCIE.WAKE */
                        MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x001b0f0 /* #PCIE.RST */
                        MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x001b0f0 /* #PCIE.DIS */
-                       /* HYS = 1, DSE = 110, PUE+PKE, SPEED = HIGH (11)*/
-                       MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x00130f0 /* PCIE.PWR_EN */
                >;
        };
 
@@ -462,6 +462,13 @@
                >;
        };
 
+       pinctrl_regpcie: regpciegrp {
+               fsl,pins = <
+                       /* HYS = 1, DSE = 110, PUE+PKE, SPEED = HIGH (11)*/
+                       MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x00130f0 /* PCIE.PWR_EN */
+               >;
+       };
+
        pinctrl_uart2: uart2grp {
                fsl,pins = <
                        MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b099