ASoC: SOF: Intel: define and set the disable_interrupts op for cavs platforms
authorRanjani Sridharan <ranjani.sridharan@linux.intel.com>
Thu, 22 Sep 2022 21:36:40 +0000 (14:36 -0700)
committerMark Brown <broonie@kernel.org>
Fri, 23 Sep 2022 12:56:17 +0000 (13:56 +0100)
Disable the IPC and SDW nterrupts in the disable_interrupts op for
cavs platforms.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20220922213644.666315-7-ranjani.sridharan@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/sof/intel/apl.c
sound/soc/sof/intel/cnl.c
sound/soc/sof/intel/hda-dsp.c
sound/soc/sof/intel/hda.h
sound/soc/sof/intel/icl.c
sound/soc/sof/intel/skl.c
sound/soc/sof/intel/tgl.c

index 886eb79ebdf1cee4dfd649b44abb27260b4f7964..44934675ec4892797fafc6e2e44fc68b6f4c1297 100644 (file)
@@ -105,6 +105,7 @@ const struct sof_intel_dsp_desc apl_chip_info = {
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
        .power_down_dsp = hda_power_down_dsp,
+       .disable_interrupts = hda_dsp_disable_interrupts,
        .hw_ip_version = SOF_INTEL_CAVS_1_5_PLUS,
 };
 EXPORT_SYMBOL_NS(apl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
index dbdd969013779895cd207236d689aca2cdd470bc..d41d02677ea5b3e14ac1dce4d8e4fa7e86a84dac 100644 (file)
@@ -413,6 +413,7 @@ const struct sof_intel_dsp_desc cnl_chip_info = {
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
        .power_down_dsp = hda_power_down_dsp,
+       .disable_interrupts = hda_dsp_disable_interrupts,
        .hw_ip_version = SOF_INTEL_CAVS_1_8,
 };
 EXPORT_SYMBOL_NS(cnl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
@@ -444,6 +445,7 @@ const struct sof_intel_dsp_desc jsl_chip_info = {
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
        .power_down_dsp = hda_power_down_dsp,
+       .disable_interrupts = hda_dsp_disable_interrupts,
        .hw_ip_version = SOF_INTEL_CAVS_2_0,
 };
 EXPORT_SYMBOL_NS(jsl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
index f85ac55536fada054828020e96cdb5f76454f493..2ab2200fc44a05ee8bc5163f5fc521dd1c06ebed 100644 (file)
@@ -989,3 +989,11 @@ power_down:
 
        return ret;
 }
+
+int hda_dsp_disable_interrupts(struct snd_sof_dev *sdev)
+{
+       hda_sdw_int_enable(sdev, false);
+       hda_dsp_ipc_int_disable(sdev);
+
+       return 0;
+}
index 65b6faff2153e48f880c6581ecc46b51886d1cc8..0b965799ea0d8eb6e59822271563c37b617942e9 100644 (file)
@@ -587,6 +587,7 @@ void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags);
 void hda_ipc_dump(struct snd_sof_dev *sdev);
 void hda_ipc_irq_dump(struct snd_sof_dev *sdev);
 void hda_dsp_d0i3_work(struct work_struct *work);
+int hda_dsp_disable_interrupts(struct snd_sof_dev *sdev);
 
 /*
  * DSP PCM Operations.
index ea10ae7a7e1ab028dbc5d31b17a09bbe0f240c87..f099a018ffb0491e63b9401671fe8ee1865b9b12 100644 (file)
@@ -176,6 +176,7 @@ const struct sof_intel_dsp_desc icl_chip_info = {
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
        .power_down_dsp = hda_power_down_dsp,
+       .disable_interrupts = hda_dsp_disable_interrupts,
        .hw_ip_version = SOF_INTEL_CAVS_2_0,
 };
 EXPORT_SYMBOL_NS(icl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
index fdf1814747c4271685a1a36cb08d400bdec34800..4ed7a85e6dd007b62bf591e7880759f23f0dfb7d 100644 (file)
@@ -112,6 +112,7 @@ const struct sof_intel_dsp_desc skl_chip_info = {
        .rom_init_timeout       = 300,
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .power_down_dsp = hda_power_down_dsp,
+       .disable_interrupts = hda_dsp_disable_interrupts,
        .hw_ip_version = SOF_INTEL_CAVS_1_5,
 };
 EXPORT_SYMBOL_NS(skl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
index 3d675e78c5fe9a1a675d58ab6d07dd65543d4378..2f34662015fd67c284471a33061f0d5e95c81e4a 100644 (file)
@@ -131,6 +131,7 @@ const struct sof_intel_dsp_desc tgl_chip_info = {
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
        .power_down_dsp = hda_power_down_dsp,
+       .disable_interrupts = hda_dsp_disable_interrupts,
        .hw_ip_version = SOF_INTEL_CAVS_2_5,
 };
 EXPORT_SYMBOL_NS(tgl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
@@ -155,6 +156,7 @@ const struct sof_intel_dsp_desc tglh_chip_info = {
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
        .power_down_dsp = hda_power_down_dsp,
+       .disable_interrupts = hda_dsp_disable_interrupts,
        .hw_ip_version = SOF_INTEL_CAVS_2_5,
 };
 EXPORT_SYMBOL_NS(tglh_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
@@ -179,6 +181,7 @@ const struct sof_intel_dsp_desc ehl_chip_info = {
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
        .power_down_dsp = hda_power_down_dsp,
+       .disable_interrupts = hda_dsp_disable_interrupts,
        .hw_ip_version = SOF_INTEL_CAVS_2_5,
 };
 EXPORT_SYMBOL_NS(ehl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
@@ -203,6 +206,7 @@ const struct sof_intel_dsp_desc adls_chip_info = {
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
        .power_down_dsp = hda_power_down_dsp,
+       .disable_interrupts = hda_dsp_disable_interrupts,
        .hw_ip_version = SOF_INTEL_CAVS_2_5,
 };
 EXPORT_SYMBOL_NS(adls_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);