drm/amd/powerplay: drop unused code and wrapper around clock retrieving

Clean code by dropping unnecessary ones.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
index 2e04ac1d8ff976aece0c615e5b799b191839b3f7..5b793e354704d40a4b3f8905070bc92548641ecb 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
@@ -1212,8 +1212,13 @@ static int arcturus_read_sensor(struct smu_context *smu,
                *(uint32_t *)data *= 100;
                *size = 4;
                break;
+       case AMDGPU_PP_SENSOR_VDDGFX:
+               ret = smu_v11_0_get_gfx_vdd(smu, (uint32_t *)data);
+               *size = 4;
+               break;
        default:
-               ret = smu_v11_0_read_sensor(smu, sensor, data, size);
+               ret = -EOPNOTSUPP;
+               break;
        }
        mutex_unlock(&smu->sensor_lock);
 
@@ -2566,7 +2571,6 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
        .set_default_dpm_table = arcturus_set_default_dpm_table,
        .populate_umd_state_clk = arcturus_populate_umd_state_clk,
        .get_thermal_temperature_range = arcturus_get_thermal_temperature_range,
-       .get_current_clk_freq_by_table = arcturus_get_current_clk_freq_by_table,
        .print_clk_levels = arcturus_print_clk_levels,
        .force_clk_levels = arcturus_force_clk_levels,
        .read_sensor = arcturus_read_sensor,

diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index f3bc1f16b0a48666af85a4e76768fa550ef7abd9..43b4a31b0ffd8b4a26743304859eb827f4b71b88 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -476,9 +476,6 @@ struct pptable_funcs {
        int (*get_fan_speed_rpm)(struct smu_context *smu, uint32_t *speed);
        int (*set_watermarks_table)(struct smu_context *smu, void *watermarks,
                                    struct dm_pp_wm_sets_with_clock_ranges_soc15 *clock_ranges);
-       int (*get_current_clk_freq_by_table)(struct smu_context *smu,
-                                            enum smu_clk_type clk_type,
-                                            uint32_t *value);
        int (*get_thermal_temperature_range)(struct smu_context *smu, struct smu_temperature_range *range);
        int (*get_uclk_dpm_states)(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states);
        int (*set_default_od_settings)(struct smu_context *smu);

diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
index b2f65438ad8d99784a7632a000261777d90a7801..4633ad02f91920ee9e15b5cbd4724a74b49afe03 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
@@ -197,19 +197,13 @@ int smu_v11_0_get_current_power_limit(struct smu_context *smu,
 
 int smu_v11_0_set_power_limit(struct smu_context *smu, uint32_t n);
 
-int smu_v11_0_get_current_clk_freq(struct smu_context *smu,
-                                         enum smu_clk_type clk_id,
-                                         uint32_t *value);
-
 int smu_v11_0_init_max_sustainable_clocks(struct smu_context *smu);
 
 int smu_v11_0_enable_thermal_alert(struct smu_context *smu);
 
 int smu_v11_0_disable_thermal_alert(struct smu_context *smu);
 
-int smu_v11_0_read_sensor(struct smu_context *smu,
-                                enum amd_pp_sensors sensor,
-                                void *data, uint32_t *size);
+int smu_v11_0_get_gfx_vdd(struct smu_context *smu, uint32_t *value);
 
 int smu_v11_0_set_min_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk);
 

diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
index d29f7522398749d163f526390eb7d13d39ebda63..0c1e1455c68f79617b98177beb009364444b6ab1 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
@@ -60,10 +60,6 @@ int smu_v12_0_powergate_jpeg(struct smu_context *smu, bool gate);
 
 int smu_v12_0_set_gfx_cgpg(struct smu_context *smu, bool enable);
 
-int smu_v12_0_read_sensor(struct smu_context *smu,
-                         enum amd_pp_sensors sensor,
-                         void *data, uint32_t *size);
-
 uint32_t smu_v12_0_get_gfxoff_status(struct smu_context *smu);
 
 int smu_v12_0_gfx_off_control(struct smu_context *smu, bool enable);
@@ -77,10 +73,6 @@ int smu_v12_0_set_default_dpm_tables(struct smu_context *smu);
 int smu_v12_0_get_enabled_mask(struct smu_context *smu,
                                      uint32_t *feature_mask, uint32_t num);
 
-int smu_v12_0_get_current_clk_freq(struct smu_context *smu,
-                                         enum smu_clk_type clk_id,
-                                         uint32_t *value);
-
 int smu_v12_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type,
                                                 uint32_t *min, uint32_t *max);
 

diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index 3dab6f0e9578cc7359d32f959fdb0d62f29f6fda..1f96a8ac3fa84319c5a320126c2f4d32ebeaf1d2 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -1707,8 +1707,13 @@ static int navi10_read_sensor(struct smu_context *smu,
                *(uint32_t *)data *= 100;
                *size = 4;
                break;
+       case AMDGPU_PP_SENSOR_VDDGFX:
+               ret = smu_v11_0_get_gfx_vdd(smu, (uint32_t *)data);
+               *size = 4;
+               break;
        default:
-               ret = smu_v11_0_read_sensor(smu, sensor, data, size);
+               ret = -EOPNOTSUPP;
+               break;
        }
        mutex_unlock(&smu->sensor_lock);
 
@@ -2399,7 +2404,6 @@ static const struct pptable_funcs navi10_ppt_funcs = {
        .set_default_dpm_table = navi10_set_default_dpm_table,
        .dpm_set_vcn_enable = navi10_dpm_set_vcn_enable,
        .dpm_set_jpeg_enable = navi10_dpm_set_jpeg_enable,
-       .get_current_clk_freq_by_table = navi10_get_current_clk_freq_by_table,
        .print_clk_levels = navi10_print_clk_levels,
        .force_clk_levels = navi10_force_clk_levels,
        .populate_umd_state_clk = navi10_populate_umd_state_clk,

diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
index d77e6de95b18c4c9bffa1f56d4e47305ae0fe27e..00fac13f06d676efc6c733549dd9ed25e140cbcd 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
@@ -907,7 +907,8 @@ static int renoir_read_sensor(struct smu_context *smu,
                *size = 4;
                break;
        default:
-               ret = smu_v12_0_read_sensor(smu, sensor, data, size);
+               ret = -EOPNOTSUPP;
+               break;
        }
        mutex_unlock(&smu->sensor_lock);
 
@@ -941,7 +942,6 @@ static const struct pptable_funcs renoir_ppt_funcs = {
        .get_current_power_state = renoir_get_current_power_state,
        .dpm_set_vcn_enable = renoir_dpm_set_vcn_enable,
        .dpm_set_jpeg_enable = renoir_dpm_set_jpeg_enable,
-       .get_current_clk_freq_by_table = renoir_get_current_clk_freq_by_table,
        .force_dpm_limit_value = renoir_force_dpm_limit_value,
        .unforce_dpm_levels = renoir_unforce_dpm_levels,
        .get_workload_type = renoir_get_workload_type,

diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
index 2b95e8a543fb41a0d0b3cde0619318b48da070b6..14a30564dbfca27ec63658e80d7bb0a7f1f407a1 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
@@ -1510,8 +1510,13 @@ static int sienna_cichlid_read_sensor(struct smu_context *smu,
                *(uint32_t *)data *= 100;
                *size = 4;
                break;
+       case AMDGPU_PP_SENSOR_VDDGFX:
+               ret = smu_v11_0_get_gfx_vdd(smu, (uint32_t *)data);
+               *size = 4;
+               break;
        default:
-               ret = smu_v11_0_read_sensor(smu, sensor, data, size);
+               ret = -EOPNOTSUPP;
+               break;
        }
        mutex_unlock(&smu->sensor_lock);
 
@@ -2479,7 +2484,6 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
        .set_default_dpm_table = sienna_cichlid_set_default_dpm_table,
        .dpm_set_vcn_enable = sienna_cichlid_dpm_set_vcn_enable,
        .dpm_set_jpeg_enable = sienna_cichlid_dpm_set_jpeg_enable,
-       .get_current_clk_freq_by_table = sienna_cichlid_get_current_clk_freq_by_table,
        .print_clk_levels = sienna_cichlid_print_clk_levels,
        .force_clk_levels = sienna_cichlid_force_clk_levels,
        .populate_umd_state_clk = sienna_cichlid_populate_umd_state_clk,

diff --git a/drivers/gpu/drm/amd/powerplay/smu_internal.h b/drivers/gpu/drm/amd/powerplay/smu_internal.h
index 053b0b3b2b6ff93991d293509222593c27affdb4..1c808ffe3ab111aaa3e4d389d13ce5eb8775baf0 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smu_internal.h
+++ b/drivers/gpu/drm/amd/powerplay/smu_internal.h
@@ -86,7 +86,6 @@
 #define smu_dpm_set_vcn_enable(smu, enable)                            smu_ppt_funcs(dpm_set_vcn_enable, 0, smu, enable)
 #define smu_dpm_set_jpeg_enable(smu, enable)                           smu_ppt_funcs(dpm_set_jpeg_enable, 0, smu, enable)
 #define smu_set_watermarks_table(smu, tab, clock_ranges)               smu_ppt_funcs(set_watermarks_table, 0, smu, tab, clock_ranges)
-#define smu_get_current_clk_freq_by_table(smu, clk_type, value)                smu_ppt_funcs(get_current_clk_freq_by_table, 0, smu, clk_type, value)
 #define smu_thermal_temperature_range_update(smu, range, rw)           smu_ppt_funcs(thermal_temperature_range_update, 0, smu, range, rw)
 #define smu_get_thermal_temperature_range(smu, range)                  smu_ppt_funcs(get_thermal_temperature_range, 0, smu, range)
 #define smu_register_irq_handler(smu)                                  smu_ppt_funcs(register_irq_handler, 0, smu)

diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index b13c8ea3eb6136c0614dd19574ba9097d63034f6..a15124190413c93677725d5232d4d9fe06e43907 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -1084,26 +1084,6 @@ int smu_v11_0_set_power_limit(struct smu_context *smu, uint32_t n)
        return 0;
 }
 
-int smu_v11_0_get_current_clk_freq(struct smu_context *smu,
-                                         enum smu_clk_type clk_id,
-                                         uint32_t *value)
-{
-       int ret = 0;
-       uint32_t freq = 0;
-
-       if (clk_id >= SMU_CLK_COUNT || !value)
-               return -EINVAL;
-
-       ret =  smu_get_current_clk_freq_by_table(smu, clk_id, &freq);
-       if (ret)
-               return ret;
-
-       freq *= 100;
-       *value = freq;
-
-       return ret;
-}
-
 int smu_v11_0_enable_thermal_alert(struct smu_context *smu)
 {
        int ret = 0;
@@ -1153,7 +1133,7 @@ static uint16_t convert_to_vddc(uint8_t vid)
        return (uint16_t) ((6200 - (vid * 25)) / SMU11_VOLTAGE_SCALE);
 }
 
-static int smu_v11_0_get_gfx_vdd(struct smu_context *smu, uint32_t *value)
+int smu_v11_0_get_gfx_vdd(struct smu_context *smu, uint32_t *value)
 {
        struct amdgpu_device *adev = smu->adev;
        uint32_t vdd = 0, val_vid = 0;
@@ -1172,31 +1152,6 @@ static int smu_v11_0_get_gfx_vdd(struct smu_context *smu, uint32_t *value)
 
 }
 
-int smu_v11_0_read_sensor(struct smu_context *smu,
-                                enum amd_pp_sensors sensor,
-                                void *data, uint32_t *size)
-{
-       int ret = 0;
-
-       if(!data || !size)
-               return -EINVAL;
-
-       switch (sensor) {
-       case AMDGPU_PP_SENSOR_VDDGFX:
-               ret = smu_v11_0_get_gfx_vdd(smu, (uint32_t *)data);
-               *size = 4;
-               break;
-       default:
-               ret = -EOPNOTSUPP;
-               break;
-       }
-
-       if (ret)
-               *size = 0;
-
-       return ret;
-}
-
 int
 smu_v11_0_display_clock_voltage_request(struct smu_context *smu,
                                        struct pp_display_clock_request

diff --git a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
index 4fb3f498420693fe059037aefd51db9173fe986c..e46fc61782359c975de85cc1fdbe9cf2165cec2e 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
@@ -203,27 +203,6 @@ int smu_v12_0_set_gfx_cgpg(struct smu_context *smu, bool enable)
                NULL);
 }
 
-int smu_v12_0_read_sensor(struct smu_context *smu,
-                                enum amd_pp_sensors sensor,
-                                void *data, uint32_t *size)
-{
-       int ret = 0;
-
-       if(!data || !size)
-               return -EINVAL;
-
-       switch (sensor) {
-       default:
-               ret = -EOPNOTSUPP;
-               break;
-       }
-
-       if (ret)
-               *size = 0;
-
-       return ret;
-}
-
 /**
  * smu_v12_0_get_gfxoff_status - get gfxoff status
  *
@@ -337,26 +316,6 @@ int smu_v12_0_get_enabled_mask(struct smu_context *smu,
        return ret;
 }
 
-int smu_v12_0_get_current_clk_freq(struct smu_context *smu,
-                                         enum smu_clk_type clk_id,
-                                         uint32_t *value)
-{
-       int ret = 0;
-       uint32_t freq = 0;
-
-       if (clk_id >= SMU_CLK_COUNT || !value)
-               return -EINVAL;
-
-       ret = smu_get_current_clk_freq_by_table(smu, clk_id, &freq);
-       if (ret)
-               return ret;
-
-       freq *= 100;
-       *value = freq;
-
-       return ret;
-}
-
 int smu_v12_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type,
                                                 uint32_t *min, uint32_t *max)
 {