int mlx5_fpga_create_qp(struct mlx5_core_dev *dev, void *fpga_qpc,
                        u32 *fpga_qpn)
 {
-       u32 in[MLX5_ST_SZ_DW(fpga_create_qp_in)] = {0};
-       u32 out[MLX5_ST_SZ_DW(fpga_create_qp_out)];
+       u32 out[MLX5_ST_SZ_DW(fpga_create_qp_out)] = {};
+       u32 in[MLX5_ST_SZ_DW(fpga_create_qp_in)] = {};
        int ret;
 
        MLX5_SET(fpga_create_qp_in, in, opcode, MLX5_CMD_OP_FPGA_CREATE_QP);
        memcpy(MLX5_ADDR_OF(fpga_create_qp_in, in, fpga_qpc), fpga_qpc,
               MLX5_FLD_SZ_BYTES(fpga_create_qp_in, fpga_qpc));
 
-       ret = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
+       ret = mlx5_cmd_exec_inout(dev, fpga_create_qp, in, out);
        if (ret)
                return ret;
 
                        enum mlx5_fpga_qpc_field_select fields,
                        void *fpga_qpc)
 {
-       u32 in[MLX5_ST_SZ_DW(fpga_modify_qp_in)] = {0};
-       u32 out[MLX5_ST_SZ_DW(fpga_modify_qp_out)];
+       u32 in[MLX5_ST_SZ_DW(fpga_modify_qp_in)] = {};
 
        MLX5_SET(fpga_modify_qp_in, in, opcode, MLX5_CMD_OP_FPGA_MODIFY_QP);
        MLX5_SET(fpga_modify_qp_in, in, field_select, fields);
        memcpy(MLX5_ADDR_OF(fpga_modify_qp_in, in, fpga_qpc), fpga_qpc,
               MLX5_FLD_SZ_BYTES(fpga_modify_qp_in, fpga_qpc));
 
-       return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
+       return mlx5_cmd_exec_in(dev, fpga_modify_qp, in);
 }
 
 int mlx5_fpga_query_qp(struct mlx5_core_dev *dev,
                       u32 fpga_qpn, void *fpga_qpc)
 {
-       u32 in[MLX5_ST_SZ_DW(fpga_query_qp_in)] = {0};
-       u32 out[MLX5_ST_SZ_DW(fpga_query_qp_out)];
+       u32 out[MLX5_ST_SZ_DW(fpga_query_qp_out)] = {};
+       u32 in[MLX5_ST_SZ_DW(fpga_query_qp_in)] = {};
        int ret;
 
        MLX5_SET(fpga_query_qp_in, in, opcode, MLX5_CMD_OP_FPGA_QUERY_QP);
        MLX5_SET(fpga_query_qp_in, in, fpga_qpn, fpga_qpn);
 
-       ret = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
+       ret = mlx5_cmd_exec_inout(dev, fpga_query_qp, in, out);
        if (ret)
                return ret;
 
 
 int mlx5_fpga_destroy_qp(struct mlx5_core_dev *dev, u32 fpga_qpn)
 {
-       u32 in[MLX5_ST_SZ_DW(fpga_destroy_qp_in)] = {0};
-       u32 out[MLX5_ST_SZ_DW(fpga_destroy_qp_out)];
+       u32 in[MLX5_ST_SZ_DW(fpga_destroy_qp_in)] = {};
 
        MLX5_SET(fpga_destroy_qp_in, in, opcode, MLX5_CMD_OP_FPGA_DESTROY_QP);
        MLX5_SET(fpga_destroy_qp_in, in, fpga_qpn, fpga_qpn);
 
-       return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
+       return mlx5_cmd_exec_in(dev, fpga_destroy_qp, in);
 }
 
 int mlx5_fpga_query_qp_counters(struct mlx5_core_dev *dev, u32 fpga_qpn,
                                bool clear, struct mlx5_fpga_qp_counters *data)
 {
-       u32 in[MLX5_ST_SZ_DW(fpga_query_qp_counters_in)] = {0};
-       u32 out[MLX5_ST_SZ_DW(fpga_query_qp_counters_out)];
+       u32 out[MLX5_ST_SZ_DW(fpga_query_qp_counters_out)] = {};
+       u32 in[MLX5_ST_SZ_DW(fpga_query_qp_counters_in)] = {};
        int ret;
 
        MLX5_SET(fpga_query_qp_counters_in, in, opcode,
        MLX5_SET(fpga_query_qp_counters_in, in, clear, clear);
        MLX5_SET(fpga_query_qp_counters_in, in, fpga_qpn, fpga_qpn);
 
-       ret = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
+       ret = mlx5_cmd_exec_inout(dev, fpga_query_qp_counters, in, out);
        if (ret)
                return ret;