arm64: dts: qcom: ipq9574: populate the opp table based on the eFuse

IPQ95xx SoCs have different OPPs available for the CPU based on
SoC variant. This can be determined from an eFuse register
present in the silicon.

Add support to read the eFuse and populate the OPPs based on it.

Frequency	1.2GHz	1.8GHz	1.5GHz	No	opp-supported-hw
					Limit
------------------------------------------------------------
936000000	1	1	1	1	0xf
1104000000	1	1	1	1	0xf
1200000000	1	1	1	1	0xf
1416000000	0	1	1	1	0x7
1488000000	0	1	1	1	0x7
1800000000	0	1	0	1	0x5
2208000000	0	0	0	1	0x1
-----------------------------------------------------------

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/14ab08b7cfd904433ca6065fac798d4f221c9d95.1697781921.git.quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index 8a72ad4afd03201c4cbb607d97ce8d1f78fa1c51..d4b7e215fc92b27eaa26ec8a6f94b13d128d8808 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -106,42 +106,56 @@
        };
 
        cpu_opp_table: opp-table-cpu {
-               compatible = "operating-points-v2";
+               compatible = "operating-points-v2-kryo-cpu";
                opp-shared;
+               nvmem-cells = <&cpu_speed_bin>;
 
                opp-936000000 {
                        opp-hz = /bits/ 64 <936000000>;
                        opp-microvolt = <725000>;
+                       opp-supported-hw = <0xf>;
                        clock-latency-ns = <200000>;
                };
 
                opp-1104000000 {
                        opp-hz = /bits/ 64 <1104000000>;
                        opp-microvolt = <787500>;
+                       opp-supported-hw = <0xf>;
+                       clock-latency-ns = <200000>;
+               };
+
+               opp-1200000000 {
+                       opp-hz = /bits/ 64 <1200000000>;
+                       opp-microvolt = <862500>;
+                       opp-supported-hw = <0xf>;
                        clock-latency-ns = <200000>;
                };
 
                opp-1416000000 {
                        opp-hz = /bits/ 64 <1416000000>;
                        opp-microvolt = <862500>;
+                       opp-supported-hw = <0x7>;
                        clock-latency-ns = <200000>;
                };
 
                opp-1488000000 {
                        opp-hz = /bits/ 64 <1488000000>;
                        opp-microvolt = <925000>;
+                       opp-supported-hw = <0x7>;
                        clock-latency-ns = <200000>;
                };
 
                opp-1800000000 {
                        opp-hz = /bits/ 64 <1800000000>;
                        opp-microvolt = <987500>;
+                       opp-supported-hw = <0x5>;
                        clock-latency-ns = <200000>;
                };
 
                opp-2208000000 {
                        opp-hz = /bits/ 64 <2208000000>;
                        opp-microvolt = <1062500>;
+                       opp-supported-hw = <0x1>;
                        clock-latency-ns = <200000>;
                };
        };
@@ -223,6 +237,11 @@
                        reg = <0x000a4000 0x5a1>;
                        #address-cells = <1>;
                        #size-cells = <1>;
+
+                       cpu_speed_bin: cpu-speed-bin@15 {
+                               reg = <0x15 0x2>;
+                               bits = <7 2>;
+                       };
                };
 
                cryptobam: dma-controller@704000 {