arm64: dts: qcom: sm6115: Hook up interconnects
authorKonrad Dybcio <konrad.dybcio@linaro.org>
Mon, 11 Dec 2023 09:23:59 +0000 (10:23 +0100)
committerBjorn Andersson <andersson@kernel.org>
Sun, 17 Dec 2023 05:19:13 +0000 (23:19 -0600)
Add interconnect provider nodes and hook up interconnects to consumer
devices, including bwmon.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231209-topic-6115iccdt-v1-2-f62da62b7276@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sm6115.dtsi

index 72a833b7cd83ae5ad8740ca82603658974d52222..160e098f10757e5f4e9c68e82ecc45f1ce27aa14 100644 (file)
@@ -10,6 +10,8 @@
 #include <dt-bindings/dma/qcom-gpi.h>
 #include <dt-bindings/firmware/qcom,scm.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interconnect/qcom,rpm-icc.h>
+#include <dt-bindings/interconnect/qcom,sm6115.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 
                scm: scm {
                        compatible = "qcom,scm-sm6115", "qcom,scm";
                        #reset-cells = <1>;
+                       interconnects = <&system_noc MASTER_CRYPTO_CORE0 RPM_ALWAYS_TAG
+                                        &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
                };
        };
 
                        status = "disabled";
                };
 
+               system_noc: interconnect@1880000 {
+                       compatible = "qcom,sm6115-snoc";
+                       reg = <0x0 0x01880000 0x0 0x5f080>;
+                       clocks = <&gcc GCC_SYS_NOC_CPUSS_AHB_CLK>,
+                                <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>,
+                                <&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>,
+                                <&rpmcc RPM_SMD_IPA_CLK>;
+                       clock-names = "cpu_axi",
+                                     "ufs_axi",
+                                     "usb_axi",
+                                     "ipa";
+                       #interconnect-cells = <2>;
+
+                       clk_virt: interconnect-clk {
+                               compatible = "qcom,sm6115-clk-virt";
+                               #interconnect-cells = <2>;
+                       };
+
+                       mmrt_virt: interconnect-mmrt {
+                               compatible = "qcom,sm6115-mmrt-virt";
+                               #interconnect-cells = <2>;
+                       };
+
+                       mmnrt_virt: interconnect-mmnrt {
+                               compatible = "qcom,sm6115-mmnrt-virt";
+                               #interconnect-cells = <2>;
+                       };
+               };
+
+               config_noc: interconnect@1900000 {
+                       compatible = "qcom,sm6115-cnoc";
+                       reg = <0x0 0x01900000 0x0 0x6200>;
+                       clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>;
+                       clock-names = "usb_axi";
+                       #interconnect-cells = <2>;
+               };
+
                qfprom@1b40000 {
                        compatible = "qcom,sm6115-qfprom", "qcom,qfprom";
                        reg = <0x0 0x01b40000 0x0 0x7000>;
                        clock-names = "core";
                };
 
+               pmu@1b8e300 {
+                       compatible = "qcom,sm6115-cpu-bwmon", "qcom,sdm845-bwmon";
+                       reg = <0x0 0x01b8e300 0x0 0x600>;
+                       interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;
+
+                       operating-points-v2 = <&cpu_bwmon_opp_table>;
+                       interconnects = <&bimc MASTER_AMPSS_M0 RPM_ACTIVE_TAG
+                                        &bimc SLAVE_EBI_CH0 RPM_ACTIVE_TAG>;
+
+                       cpu_bwmon_opp_table: opp-table {
+                               compatible = "operating-points-v2";
+
+                               opp-0 {
+                                       opp-peak-kBps = <(200 * 4 * 1000)>;
+                               };
+
+                               opp-1 {
+                                       opp-peak-kBps = <(300 * 4 * 1000)>;
+                               };
+
+                               opp-2 {
+                                       opp-peak-kBps = <(451 * 4 * 1000)>;
+                               };
+
+                               opp-3 {
+                                       opp-peak-kBps = <(547 * 4 * 1000)>;
+                               };
+
+                               opp-4 {
+                                       opp-peak-kBps = <(681 * 4 * 1000)>;
+                               };
+
+                               opp-5 {
+                                       opp-peak-kBps = <(768 * 4 * 1000)>;
+                               };
+
+                               opp-6 {
+                                       opp-peak-kBps = <(1017 * 4 * 1000)>;
+                               };
+
+                               opp-7 {
+                                       opp-peak-kBps = <(1353 * 4 * 1000)>;
+                               };
+
+                               opp-8 {
+                                       opp-peak-kBps = <(1555 * 4 * 1000)>;
+                               };
+
+                               opp-9 {
+                                       opp-peak-kBps = <(1804 * 4 * 1000)>;
+                               };
+                       };
+               };
+
                spmi_bus: spmi@1c40000 {
                        compatible = "qcom,spmi-pmic-arb";
                        reg = <0x0 0x01c40000 0x0 0x1100>,
                        #thermal-sensor-cells = <1>;
                };
 
+               bimc: interconnect@4480000 {
+                       compatible = "qcom,sm6115-bimc";
+                       reg = <0x0 0x04480000 0x0 0x80000>;
+                       #interconnect-cells = <2>;
+               };
+
                rpm_msg_ram: sram@45f0000 {
                        compatible = "qcom,rpm-msg-ram";
                        reg = <0x0 0x045f0000 0x0 0x7000>;
                                 <&gcc GCC_SDCC1_ICE_CORE_CLK>;
                        clock-names = "iface", "core", "xo", "ice";
 
+                       power-domains = <&rpmpd SM6115_VDDCX>;
+                       operating-points-v2 = <&sdhc1_opp_table>;
+                       interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG
+                                        &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>,
+                                       <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                        &config_noc SLAVE_SDCC_1 RPM_ALWAYS_TAG>;
+                       interconnect-names = "sdhc-ddr",
+                                            "cpu-sdhc";
+
                        bus-width = <8>;
                        status = "disabled";
+
+                       sdhc1_opp_table: opp-table {
+                               compatible = "operating-points-v2";
+
+                               opp-100000000 {
+                                       opp-hz = /bits/ 64 <100000000>;
+                                       required-opps = <&rpmpd_opp_low_svs>;
+                                       opp-peak-kBps = <250000 133320>;
+                                       opp-avg-kBps = <102400 65000>;
+                               };
+
+                               opp-192000000 {
+                                       opp-hz = /bits/ 64 <192000000>;
+                                       required-opps = <&rpmpd_opp_low_svs>;
+                                       opp-peak-kBps = <800000 300000>;
+                                       opp-avg-kBps = <204800 200000>;
+                               };
+
+                               opp-384000000 {
+                                       opp-hz = /bits/ 64 <384000000>;
+                                       required-opps = <&rpmpd_opp_svs_plus>;
+                                       opp-peak-kBps = <800000 300000>;
+                                       opp-avg-kBps = <204800 200000>;
+                               };
+                       };
                };
 
                sdhc_2: mmc@4784000 {
                        operating-points-v2 = <&sdhc2_opp_table>;
                        iommus = <&apps_smmu 0x00a0 0x0>;
                        resets = <&gcc GCC_SDCC2_BCR>;
+                       interconnects = <&system_noc MASTER_SDCC_2 RPM_ALWAYS_TAG
+                                        &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>,
+                                       <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                        &config_noc SLAVE_SDCC_2 RPM_ALWAYS_TAG>;
+                       interconnect-names = "sdhc-ddr",
+                                            "cpu-sdhc";
 
                        bus-width = <4>;
                        qcom,dll-config = <0x0007642c>;
                                opp-100000000 {
                                        opp-hz = /bits/ 64 <100000000>;
                                        required-opps = <&rpmpd_opp_low_svs>;
+                                       opp-peak-kBps = <250000 133320>;
+                                       opp-avg-kBps = <261438 150000>;
                                };
 
                                opp-202000000 {
                                        opp-hz = /bits/ 64 <202000000>;
                                        required-opps = <&rpmpd_opp_nom>;
+                                       opp-peak-kBps = <800000 300000>;
+                                       opp-avg-kBps = <261438 300000>;
                                };
                        };
                };
                                dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
                                       <&gpi_dma0 1 0 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+                                               <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+                                                &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config",
+                                                    "qup-memory";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                                dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
                                       <&gpi_dma0 1 0 QCOM_GPI_SPI>;
                                dma-names = "tx", "rx";
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+                                               <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+                                                &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config",
+                                                    "qup-memory";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                                dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
                                       <&gpi_dma0 1 1 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+                                               <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+                                                &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                                dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
                                       <&gpi_dma0 1 1 QCOM_GPI_SPI>;
                                dma-names = "tx", "rx";
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+                                               <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+                                                &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config",
+                                                    "qup-memory";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                                dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
                                       <&gpi_dma0 1 2 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+                                               <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+                                                &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config",
+                                                    "qup-memory";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                                dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
                                       <&gpi_dma0 1 2 QCOM_GPI_SPI>;
                                dma-names = "tx", "rx";
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+                                               <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+                                                &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config",
+                                                    "qup-memory";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                                dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
                                       <&gpi_dma0 1 3 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+                                               <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+                                                &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config",
+                                                    "qup-memory";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                                dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
                                       <&gpi_dma0 1 3 QCOM_GPI_SPI>;
                                dma-names = "tx", "rx";
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+                                               <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+                                                &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config",
+                                                    "qup-memory";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                                clock-names = "se";
                                power-domains = <&rpmpd SM6115_VDDCX>;
                                operating-points-v2 = <&qup_opp_table>;
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config";
                                status = "disabled";
                        };
 
                                dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
                                       <&gpi_dma0 1 4 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+                                               <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+                                                &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config",
+                                                    "qup-memory";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                                dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
                                       <&gpi_dma0 1 4 QCOM_GPI_SPI>;
                                dma-names = "tx", "rx";
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+                                               <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+                                                &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config",
+                                                    "qup-memory";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
                                interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>;
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config";
                                status = "disabled";
                        };
 
                                dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
                                       <&gpi_dma0 1 5 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+                                               <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+                                                &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config",
+                                                    "qup-memory";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                                dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
                                       <&gpi_dma0 1 5 QCOM_GPI_SPI>;
                                dma-names = "tx", "rx";
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+                                               <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+                                                &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config",
+                                                    "qup-memory";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
 
                        resets = <&gcc GCC_USB30_PRIM_BCR>;
                        power-domains = <&gcc GCC_USB30_PRIM_GDSC>;
+                        /* TODO: USB<->IPA path */
+                       interconnects = <&system_noc MASTER_USB3 RPM_ALWAYS_TAG
+                                        &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>,
+                                       <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                        &config_noc SLAVE_USB3 RPM_ALWAYS_TAG>;
+                       interconnect-names = "usb-ddr",
+                                            "apps-usb";
+
                        qcom,select-utmi-as-pipe-clk;
                        status = "disabled";
 
                        iommus = <&apps_smmu 0x420 0x2>,
                                 <&apps_smmu 0x421 0x0>;
 
+                       interconnects = <&mmrt_virt MASTER_MDP_PORT0 RPM_ALWAYS_TAG
+                                        &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>,
+                                       <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+                                        &config_noc SLAVE_DISPLAY_CFG RPM_ALWAYS_TAG>;
+                       interconnect-names = "mdp0-mem",
+                                            "cpu-cfg";
+
                        #address-cells = <2>;
                        #size-cells = <2>;
                        ranges;