i2c: tegra: Check DMA completion status in addition to left time

It is more robust to check completion status in addition to the left time
in a case of DMA transfer because transfer's completion happens in two
phases [one is ISR, other is tasklet] and thus it is possible that DMA is
completed while I2C completion awaiting times out because of the deferred
notification done by the DMA driver. The DMA completion status becomes
100% actual after DMA synchronization. This fixes spurious DMA timeouts
when system is under load.

Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>

diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 3c7c86d4b0e4b43bc230258b24a51cfe5493f02c..cbc2ad49043e49d8088d73235e64a036d16991ba 100644 (file)
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -1224,7 +1224,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
                                         i2c_dev->rx_dma_chan :
                                         i2c_dev->tx_dma_chan);
 
-               if (time_left == 0) {
+               if (!time_left && !completion_done(&i2c_dev->dma_complete)) {
                        dev_err(i2c_dev->dev, "DMA transfer timeout\n");
                        tegra_i2c_init(i2c_dev, true);
                        return -ETIMEDOUT;