/* Unit registers */
switch (addr) {
case SCALER_OFFSET:
- trace_grlib_gptimer_readl(-1, "scaler:", unit->scaler);
+ trace_grlib_gptimer_readl(-1, addr, unit->scaler);
return unit->scaler;
case SCALER_RELOAD_OFFSET:
- trace_grlib_gptimer_readl(-1, "reload:", unit->reload);
+ trace_grlib_gptimer_readl(-1, addr, unit->reload);
return unit->reload;
case CONFIG_OFFSET:
- trace_grlib_gptimer_readl(-1, "config:", unit->config);
+ trace_grlib_gptimer_readl(-1, addr, unit->config);
return unit->config;
default:
switch (timer_addr) {
case COUNTER_OFFSET:
value = ptimer_get_count(unit->timers[id].ptimer);
- trace_grlib_gptimer_readl(id, "counter value:", value);
+ trace_grlib_gptimer_readl(id, addr, value);
return value;
case COUNTER_RELOAD_OFFSET:
value = unit->timers[id].reload;
- trace_grlib_gptimer_readl(id, "reload value:", value);
+ trace_grlib_gptimer_readl(id, addr, value);
return value;
case CONFIG_OFFSET:
- trace_grlib_gptimer_readl(id, "scaler value:",
- unit->timers[id].config);
+ trace_grlib_gptimer_readl(id, addr, unit->timers[id].config);
return unit->timers[id].config;
default:
}
- trace_grlib_gptimer_unknown_register("read", addr);
+ trace_grlib_gptimer_readl(-1, addr, 0);
return 0;
}
case SCALER_OFFSET:
value &= 0xFFFF; /* clean up the value */
unit->scaler = value;
- trace_grlib_gptimer_writel(-1, "scaler:", unit->scaler);
+ trace_grlib_gptimer_writel(-1, addr, unit->scaler);
return;
case SCALER_RELOAD_OFFSET:
value &= 0xFFFF; /* clean up the value */
unit->reload = value;
- trace_grlib_gptimer_writel(-1, "reload:", unit->reload);
+ trace_grlib_gptimer_writel(-1, addr, unit->reload);
grlib_gptimer_set_scaler(unit, value);
return;
case CONFIG_OFFSET:
/* Read Only (disable timer freeze not supported) */
- trace_grlib_gptimer_writel(-1, "config (Read Only):", 0);
+ trace_grlib_gptimer_writel(-1, addr, 0);
return;
default:
/* GPTimer registers */
switch (timer_addr) {
case COUNTER_OFFSET:
- trace_grlib_gptimer_writel(id, "counter:", value);
+ trace_grlib_gptimer_writel(id, addr, value);
unit->timers[id].counter = value;
grlib_gptimer_enable(&unit->timers[id]);
return;
case COUNTER_RELOAD_OFFSET:
- trace_grlib_gptimer_writel(id, "reload:", value);
+ trace_grlib_gptimer_writel(id, addr, value);
unit->timers[id].reload = value;
return;
case CONFIG_OFFSET:
- trace_grlib_gptimer_writel(id, "config:", value);
+ trace_grlib_gptimer_writel(id, addr, value);
if (value & GPTIMER_INT_PENDING) {
/* clear pending bit */
}
- trace_grlib_gptimer_unknown_register("write", addr);
+ trace_grlib_gptimer_writel(-1, addr, value);
}
static CPUReadMemoryFunc * const grlib_gptimer_read[] = {
disable grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
disable grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
disable grlib_gptimer_hit(int id) "timer:%d HIT"
-disable grlib_gptimer_readl(int id, const char *s, uint32_t val) "timer:%d %s 0x%x"
-disable grlib_gptimer_writel(int id, const char *s, uint32_t val) "timer:%d %s 0x%x"
-disable grlib_gptimer_unknown_register(const char *op, uint64_t val) "%s unknown register 0x%"PRIx64""
+disable grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
+disable grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
# hw/grlib_irqmp.c
disable grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x\n"
disable grlib_irqmp_ack(int intno) "interrupt:%d"
disable grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
-disable grlib_irqmp_unknown_register(const char *op, uint64_t val) "%s unknown register 0x%"PRIx64""
+disable grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64""
+disable grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
# hw/grlib_apbuart.c
disable grlib_apbuart_event(int event) "event:%d"
-disable grlib_apbuart_unknown_register(const char *op, uint64_t val) "%s unknown register 0x%"PRIx64""
+disable grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
# hw/leon3.c
disable leon3_set_irq(int intno) "Set CPU IRQ %d"