arm64: dts: ls1028a: move pixel clock pll into /soc

Move it inside the /soc subnode because it is part of the CCSR space.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 343ecf0e8973a2faf4b61f820880c8f8b75694d6..9a65a7118faa3635fd4c9a19a7ad74d53dc4f309 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -80,13 +80,6 @@
                clock-output-names = "phy_27m";
        };
 
-       dpclk: clock-controller@f1f0000 {
-               compatible = "fsl,ls1028a-plldig";
-               reg = <0x0 0xf1f0000 0x0 0xffff>;
-               #clock-cells = <0>;
-               clocks = <&osc_27m>;
-       };
-
        firmware {
                optee: optee  {
                        compatible = "linaro,optee-tz";
@@ -926,6 +919,13 @@
                        status = "disabled";
                };
 
+               dpclk: clock-controller@f1f0000 {
+                       compatible = "fsl,ls1028a-plldig";
+                       reg = <0x0 0xf1f0000 0x0 0x10000>;
+                       #clock-cells = <0>;
+                       clocks = <&osc_27m>;
+               };
+
                tmu: tmu@1f80000 {
                        compatible = "fsl,qoriq-tmu";
                        reg = <0x0 0x1f80000 0x0 0x10000>;