static int stv090x_get_agc2_min_level(struct stv090x_state *state)
 {
-       u32 agc2_min = 0, agc2 = 0, freq_init, freq_step, reg;
+       u32 agc2_min = 0xffff, agc2 = 0, freq_init, freq_step, reg;
        s32 i, j, steps, dir;
 
        if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
                if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
                        goto err;
                msleep(10);
+
+               agc2 = 0;
                for (j = 0; j < 10; j++) {
-                       agc2 += STV090x_READ_DEMOD(state, AGC2I1) << 8;
-                       agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
+                       agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
+                               STV090x_READ_DEMOD(state, AGC2I0);
                }
                agc2 /= 10;
-               agc2_min = 0xffff;
-               if (agc2 < 0xffff)
+               if (agc2 < agc2_min)
                        agc2_min = agc2;
        }
 
        int tmg_lock = 0, i;
        s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
        u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
+       u32 agc2th;
+
+       if (state->dev_ver >= 0x30)
+               agc2th = 0x2e00;
+       else
+               agc2th = 0x1f00;
 
        reg = STV090x_READ_DEMOD(state, DMDISTATE);
        STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
                goto err;
        if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
                goto err;
-       if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x60) < 0)
+       if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x50) < 0)
                goto err;
 
        if (state->dev_ver >= 0x30) {
                        reg = STV090x_READ_DEMOD(state, DSTATUS);
                        if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
                                tmg_cpt++;
-                       agc2 += STV090x_READ_DEMOD(state, AGC2I1) << 8;
-                       agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
+                       agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
+                               STV090x_READ_DEMOD(state, AGC2I0);
                }
                agc2 /= 10;
                srate_coarse = stv090x_get_srate(state, state->mclk);
                cur_step++;
                dir *= -1;
-               if ((tmg_cpt >= 5) && (agc2 < 0x1f00) && (srate_coarse < 55000000) && (srate_coarse > 850000))
+               if ((tmg_cpt >= 5) && (agc2 < agc2th) &&
+                   (srate_coarse < 50000000) && (srate_coarse > 850000))
                        tmg_lock = 1;
                else if (cur_step < steps) {
                        if (dir > 0)
                if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
                        goto err;
 
+               if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
+                       goto err;
+
                if (state->dev_ver >= 0x30) {
                        if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0)
                                goto err;
                                cpt_fail = 0;
                                agc2_ovflw = 0;
                                for (i = 0; i < 10; i++) {
-                                       agc2  = STV090x_READ_DEMOD(state, AGC2I1) << 8;
-                                       agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
+                                       agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
+                                               STV090x_READ_DEMOD(state, AGC2I0);
                                        if (agc2 >= 0xff00)
                                                agc2_ovflw++;
                                        reg = STV090x_READ_DEMOD(state, DSTATUS2);