drm/amd/pm: enable gfxoff control on smu_v13_0_7
authorKenneth Feng <kenneth.feng@amd.com>
Fri, 29 Apr 2022 09:19:26 +0000 (17:19 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 10 May 2022 21:53:11 +0000 (17:53 -0400)
enable gfxoff control interface on smu_v13_0_7

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c

index c61df47020d6ce9d52e703aed9cf56a5d7cf7f6e..79f2a5c5197d08310ec19e87de905cd3c6227670 100644 (file)
@@ -5193,6 +5193,7 @@ static int gfx_v11_0_set_powergating_state(void *handle,
 
        switch (adev->ip_versions[GC_HWIP][0]) {
        case IP_VERSION(11, 0, 0):
+       case IP_VERSION(11, 0, 2):
                amdgpu_gfx_off_ctrl(adev, enable);
                break;
        default:
index d73deb3e596fffedd0f3c54b41bc52259f87a7fd..aee1741d98e9543837b222386224be16d4a930a7 100644 (file)
@@ -834,6 +834,7 @@ int smu_v13_0_gfx_off_control(struct smu_context *smu, bool enable)
        case IP_VERSION(13, 0, 1):
        case IP_VERSION(13, 0, 3):
        case IP_VERSION(13, 0, 5):
+       case IP_VERSION(13, 0, 7):
        case IP_VERSION(13, 0, 8):
                if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
                        return 0;
index 49ae363d2df58301a4b60af79983843c076a11c0..0b6a4df8a6d7de5fa9a9edce5b3f03389761c764 100644 (file)
@@ -113,6 +113,8 @@ static struct cmn2asic_msg_mapping smu_v13_0_7_message_map[SMU_MSG_MAX_COUNT] =
        MSG_MAP(DramLogSetDramAddrHigh,         PPSMC_MSG_DramLogSetDramAddrHigh,      0),
        MSG_MAP(DramLogSetDramAddrLow,          PPSMC_MSG_DramLogSetDramAddrLow,       0),
        MSG_MAP(DramLogSetDramSize,             PPSMC_MSG_DramLogSetDramSize,          0),
+       MSG_MAP(AllowGfxOff,                    PPSMC_MSG_AllowGfxOff,                 0),
+       MSG_MAP(DisallowGfxOff,                 PPSMC_MSG_DisallowGfxOff,              0),
 };
 
 static struct cmn2asic_mapping smu_v13_0_7_clk_map[SMU_CLK_COUNT] = {
@@ -1486,6 +1488,7 @@ static const struct pptable_funcs smu_v13_0_7_ppt_funcs = {
        .get_gpu_metrics = smu_v13_0_7_get_gpu_metrics,
        .set_soft_freq_limited_range = smu_v13_0_set_soft_freq_limited_range,
        .set_performance_level = smu_v13_0_set_performance_level,
+       .gfx_off_control = smu_v13_0_gfx_off_control,
        .get_fan_speed_pwm = smu_v13_0_7_get_fan_speed_pwm,
        .get_fan_speed_rpm = smu_v13_0_7_get_fan_speed_rpm,
        .set_fan_speed_pwm = smu_v13_0_set_fan_speed_pwm,