ASoC: cs42l51: Update to use maple tree register cache
authorMark Brown <broonie@kernel.org>
Thu, 13 Jul 2023 00:13:18 +0000 (01:13 +0100)
committerMark Brown <broonie@kernel.org>
Tue, 18 Jul 2023 13:45:06 +0000 (14:45 +0100)
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.

Update the cs42l51 driver to use the more modern data structure.

Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230713-asoc-cirrus-maple-v1-5-a62651831735@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/cs42l51.c

index a67cd3ee84e0a29e5ad1f2bed7fff697da79764d..36066fac394fa93c21a147ad79ae6090a9dc66a8 100644 (file)
@@ -703,7 +703,7 @@ const struct regmap_config cs42l51_regmap = {
        .volatile_reg = cs42l51_volatile_reg,
        .writeable_reg = cs42l51_writeable_reg,
        .max_register = CS42L51_CHARGE_FREQ,
-       .cache_type = REGCACHE_RBTREE,
+       .cache_type = REGCACHE_MAPLE,
 };
 EXPORT_SYMBOL_GPL(cs42l51_regmap);