arm64/sysreg: Add definition for ID_AA64ISAR3_EL1

DDI0601 2023-09 adds a new system register ID_AA64ISAR3_EL1 enumerating
new floating point and TLB invalidation features. Add a defintion for it.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Fuad Tabba <tabba@google.com>
Link: https://lore.kernel.org/r/20231209-b4-arm64-sysreg-additions-v1-7-45284e538474@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 7af081c52ce7ccdf9ab38643d18aa8ae65b896a4..7dc7c76ee4ceac0cab63fdbe24d8e3b5da1bca00 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -1433,6 +1433,23 @@ UnsignedEnum     3:0     WFxT
 EndEnum
 EndSysreg
 
+Sysreg ID_AA64ISAR3_EL1        3       0       0       6       3
+Res0   63:12
+UnsignedEnum   11:8    TLBIW
+       0b0000  NI
+       0b0001  IMP
+EndEnum
+UnsignedEnum   7:4     FAMINMAX
+       0b0000  NI
+       0b0001  IMP
+EndEnum
+UnsignedEnum   3:0     CPA
+       0b0000  NI
+       0b0001  IMP
+       0b0010  CPA2
+EndEnum
+EndSysreg
+
 Sysreg ID_AA64MMFR0_EL1        3       0       0       7       0
 UnsignedEnum   63:60   ECV
        0b0000  NI