"AXP223",
        "AXP288",
        "AXP313a",
+       "AXP717",
        "AXP803",
        "AXP806",
        "AXP809",
        .n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges),
 };
 
+static const struct regmap_range axp717_writeable_ranges[] = {
+       regmap_reg_range(AXP717_IRQ0_EN, AXP717_IRQ4_EN),
+       regmap_reg_range(AXP717_DCDC_OUTPUT_CONTROL, AXP717_CPUSLDO_CONTROL),
+};
+
+static const struct regmap_range axp717_volatile_ranges[] = {
+       regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE),
+};
+
+static const struct regmap_access_table axp717_writeable_table = {
+       .yes_ranges = axp717_writeable_ranges,
+       .n_yes_ranges = ARRAY_SIZE(axp717_writeable_ranges),
+};
+
+static const struct regmap_access_table axp717_volatile_table = {
+       .yes_ranges = axp717_volatile_ranges,
+       .n_yes_ranges = ARRAY_SIZE(axp717_volatile_ranges),
+};
+
 static const struct regmap_range axp806_volatile_ranges[] = {
        regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
 };
        DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
 };
 
+static const struct resource axp717_pek_resources[] = {
+       DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
+       DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
+};
+
 static const struct resource axp803_pek_resources[] = {
        DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
        DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
        .cache_type = REGCACHE_MAPLE,
 };
 
+static const struct regmap_config axp717_regmap_config = {
+       .reg_bits = 8,
+       .val_bits = 8,
+       .wr_table = &axp717_writeable_table,
+       .volatile_table = &axp717_volatile_table,
+       .max_register = AXP717_CPUSLDO_CONTROL,
+       .cache_type = REGCACHE_RBTREE,
+};
+
 static const struct regmap_config axp806_regmap_config = {
        .reg_bits       = 8,
        .val_bits       = 8,
        INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH,         0, 0),
 };
 
+static const struct regmap_irq axp717_regmap_irqs[] = {
+       INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL2,          0, 7),
+       INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL1,          0, 6),
+       INIT_REGMAP_IRQ(AXP717, GAUGE_NEW_SOC,          0, 4),
+       INIT_REGMAP_IRQ(AXP717, BOOST_OVER_V,           0, 2),
+       INIT_REGMAP_IRQ(AXP717, VBUS_OVER_V,            0, 1),
+       INIT_REGMAP_IRQ(AXP717, VBUS_FAULT,             0, 0),
+       INIT_REGMAP_IRQ(AXP717, VBUS_PLUGIN,            1, 7),
+       INIT_REGMAP_IRQ(AXP717, VBUS_REMOVAL,           1, 6),
+       INIT_REGMAP_IRQ(AXP717, BATT_PLUGIN,            1, 5),
+       INIT_REGMAP_IRQ(AXP717, BATT_REMOVAL,           1, 4),
+       INIT_REGMAP_IRQ(AXP717, PEK_SHORT,              1, 3),
+       INIT_REGMAP_IRQ(AXP717, PEK_LONG,               1, 2),
+       INIT_REGMAP_IRQ(AXP717, PEK_FAL_EDGE,           1, 1),
+       INIT_REGMAP_IRQ(AXP717, PEK_RIS_EDGE,           1, 0),
+       INIT_REGMAP_IRQ(AXP717, WDOG_EXPIRE,            2, 7),
+       INIT_REGMAP_IRQ(AXP717, LDO_OVER_CURR,          2, 6),
+       INIT_REGMAP_IRQ(AXP717, BATT_OVER_CURR,         2, 5),
+       INIT_REGMAP_IRQ(AXP717, CHARG_DONE,             2, 4),
+       INIT_REGMAP_IRQ(AXP717, CHARG,                  2, 3),
+       INIT_REGMAP_IRQ(AXP717, DIE_TEMP_HIGH,          2, 2),
+       INIT_REGMAP_IRQ(AXP717, CHARG_TIMER,            2, 1),
+       INIT_REGMAP_IRQ(AXP717, BATT_OVER_V,            2, 0),
+       INIT_REGMAP_IRQ(AXP717, BC_USB_DONE,            3, 7),
+       INIT_REGMAP_IRQ(AXP717, BC_USB_CHNG,            3, 6),
+       INIT_REGMAP_IRQ(AXP717, BATT_QUIT_TEMP_HIGH,    3, 4),
+       INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_HIGH,     3, 3),
+       INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_LOW,      3, 2),
+       INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_HIGH,     3, 1),
+       INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_LOW,      3, 0),
+       INIT_REGMAP_IRQ(AXP717, TYPEC_REMOVE,           4, 6),
+       INIT_REGMAP_IRQ(AXP717, TYPEC_PLUGIN,           4, 5),
+};
+
 static const struct regmap_irq axp803_regmap_irqs[] = {
        INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V,            0, 7),
        INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN,            0, 6),
        .num_regs               = 1,
 };
 
+static const struct regmap_irq_chip axp717_regmap_irq_chip = {
+       .name                   = "axp717_irq_chip",
+       .status_base            = AXP717_IRQ0_STATE,
+       .ack_base               = AXP717_IRQ0_STATE,
+       .unmask_base            = AXP717_IRQ0_EN,
+       .init_ack_masked        = true,
+       .irqs                   = axp717_regmap_irqs,
+       .num_irqs               = ARRAY_SIZE(axp717_regmap_irqs),
+       .num_regs               = 5,
+};
+
 static const struct regmap_irq_chip axp803_regmap_irq_chip = {
        .name                   = "axp803",
        .status_base            = AXP20X_IRQ1_STATE,
        MFD_CELL_RES("axp313a-pek", axp313a_pek_resources),
 };
 
+static struct mfd_cell axp717_cells[] = {
+       MFD_CELL_NAME("axp20x-regulator"),
+       MFD_CELL_RES("axp20x-pek", axp717_pek_resources),
+};
+
 static const struct resource axp288_adc_resources[] = {
        DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
 };
                axp20x->regmap_cfg = &axp313a_regmap_config;
                axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip;
                break;
+       case AXP717_ID:
+               axp20x->nr_cells = ARRAY_SIZE(axp717_cells);
+               axp20x->cells = axp717_cells;
+               axp20x->regmap_cfg = &axp717_regmap_config;
+               axp20x->regmap_irq_chip = &axp717_regmap_irq_chip;
+               break;
        case AXP803_ID:
                axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
                axp20x->cells = axp803_cells;
 
        AXP223_ID,
        AXP288_ID,
        AXP313A_ID,
+       AXP717_ID,
        AXP803_ID,
        AXP806_ID,
        AXP809_ID,
 #define AXP313A_IRQ_EN                 0x20
 #define AXP313A_IRQ_STATE              0x21
 
+#define AXP717_ON_INDICATE             0x00
+#define AXP717_IRQ0_EN                 0x40
+#define AXP717_IRQ1_EN                 0x41
+#define AXP717_IRQ2_EN                 0x42
+#define AXP717_IRQ3_EN                 0x43
+#define AXP717_IRQ4_EN                 0x44
+#define AXP717_IRQ0_STATE              0x48
+#define AXP717_IRQ1_STATE              0x49
+#define AXP717_IRQ2_STATE              0x4a
+#define AXP717_IRQ3_STATE              0x4b
+#define AXP717_IRQ4_STATE              0x4c
+#define AXP717_DCDC_OUTPUT_CONTROL     0x80
+#define AXP717_DCDC1_CONTROL           0x83
+#define AXP717_DCDC2_CONTROL           0x84
+#define AXP717_DCDC3_CONTROL           0x85
+#define AXP717_DCDC4_CONTROL           0x86
+#define AXP717_LDO0_OUTPUT_CONTROL     0x90
+#define AXP717_LDO1_OUTPUT_CONTROL     0x91
+#define AXP717_ALDO1_CONTROL           0x93
+#define AXP717_ALDO2_CONTROL           0x94
+#define AXP717_ALDO3_CONTROL           0x95
+#define AXP717_ALDO4_CONTROL           0x96
+#define AXP717_BLDO1_CONTROL           0x97
+#define AXP717_BLDO2_CONTROL           0x98
+#define AXP717_BLDO3_CONTROL           0x99
+#define AXP717_BLDO4_CONTROL           0x9a
+#define AXP717_CLDO1_CONTROL           0x9b
+#define AXP717_CLDO2_CONTROL           0x9c
+#define AXP717_CLDO3_CONTROL           0x9d
+#define AXP717_CLDO4_CONTROL           0x9e
+#define AXP717_CPUSLDO_CONTROL         0x9f
+
 #define AXP806_STARTUP_SRC             0x00
 #define AXP806_CHIP_ID                 0x03
 #define AXP806_PWR_OUT_CTRL1           0x10
        AXP313A_IRQ_PEK_RIS_EDGE,
 };
 
+enum axp717_irqs {
+       AXP717_IRQ_VBUS_FAULT,
+       AXP717_IRQ_VBUS_OVER_V,
+       AXP717_IRQ_BOOST_OVER_V,
+       AXP717_IRQ_GAUGE_NEW_SOC = 4,
+       AXP717_IRQ_SOC_DROP_LVL1 = 6,
+       AXP717_IRQ_SOC_DROP_LVL2,
+       AXP717_IRQ_PEK_RIS_EDGE,
+       AXP717_IRQ_PEK_FAL_EDGE,
+       AXP717_IRQ_PEK_LONG,
+       AXP717_IRQ_PEK_SHORT,
+       AXP717_IRQ_BATT_REMOVAL,
+       AXP717_IRQ_BATT_PLUGIN,
+       AXP717_IRQ_VBUS_REMOVAL,
+       AXP717_IRQ_VBUS_PLUGIN,
+       AXP717_IRQ_BATT_OVER_V,
+       AXP717_IRQ_CHARG_TIMER,
+       AXP717_IRQ_DIE_TEMP_HIGH,
+       AXP717_IRQ_CHARG,
+       AXP717_IRQ_CHARG_DONE,
+       AXP717_IRQ_BATT_OVER_CURR,
+       AXP717_IRQ_LDO_OVER_CURR,
+       AXP717_IRQ_WDOG_EXPIRE,
+       AXP717_IRQ_BATT_ACT_TEMP_LOW,
+       AXP717_IRQ_BATT_ACT_TEMP_HIGH,
+       AXP717_IRQ_BATT_CHG_TEMP_LOW,
+       AXP717_IRQ_BATT_CHG_TEMP_HIGH,
+       AXP717_IRQ_BATT_QUIT_TEMP_HIGH,
+       AXP717_IRQ_BC_USB_CHNG = 30,
+       AXP717_IRQ_BC_USB_DONE,
+       AXP717_IRQ_TYPEC_PLUGIN = 37,
+       AXP717_IRQ_TYPEC_REMOVE,
+};
+
 enum axp803_irqs {
        AXP803_IRQ_ACIN_OVER_V = 1,
        AXP803_IRQ_ACIN_PLUGIN,