phy: qcom-qmp-combo: use v6 registers in v6 regs layout
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 28 Sep 2023 10:54:45 +0000 (13:54 +0300)
committerVinod Koul <vkoul@kernel.org>
Fri, 13 Oct 2023 10:05:21 +0000 (15:35 +0530)
Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230928105445.1210861-4-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h

index 02d22595f747a03bd5974378a9e4a598c8aa326b..9c87845c78ec24aa14f0993a7b35e4b0034a565f 100644 (file)
@@ -194,14 +194,14 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
 };
 
 static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
-       [QPHY_SW_RESET]                 = QPHY_V5_PCS_SW_RESET,
-       [QPHY_START_CTRL]               = QPHY_V5_PCS_START_CONTROL,
-       [QPHY_PCS_STATUS]               = QPHY_V5_PCS_PCS_STATUS1,
-       [QPHY_PCS_POWER_DOWN_CONTROL]   = QPHY_V5_PCS_POWER_DOWN_CONTROL,
+       [QPHY_SW_RESET]                 = QPHY_V6_PCS_SW_RESET,
+       [QPHY_START_CTRL]               = QPHY_V6_PCS_START_CONTROL,
+       [QPHY_PCS_STATUS]               = QPHY_V6_PCS_PCS_STATUS1,
+       [QPHY_PCS_POWER_DOWN_CONTROL]   = QPHY_V6_PCS_POWER_DOWN_CONTROL,
 
        /* In PCS_USB */
-       [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL,
-       [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
+       [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL,
+       [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
 
        [QPHY_COM_RESETSM_CNTRL]        = QSERDES_V6_COM_RESETSM_CNTRL,
        [QPHY_COM_C_READY_STATUS]       = QSERDES_V6_COM_C_READY_STATUS,
index 7c16af0b1cc304eab3bb086c8fba822ed8eab303..df670143feb1e6c9647ae367f1eb15f3db5d6e3e 100644 (file)
@@ -6,8 +6,9 @@
 #ifndef QCOM_PHY_QMP_PCS_USB_V6_H_
 #define QCOM_PHY_QMP_PCS_USB_V6_H_
 
-/* Only for QMP V6 PHY - USB3 have different offsets than V5 */
 #define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1           0x00
+#define QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL          0x08
+#define QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR         0x14
 #define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL       0x18
 #define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2      0x3c
 #define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L            0x40
index 47cedb860fefdc64c907fe68ad4010964fcd5dc8..08299d2b78f096fa5f9388a4d54ddfa85667b18c 100644 (file)
@@ -7,6 +7,10 @@
 #define QCOM_PHY_QMP_PCS_V6_H_
 
 /* Only for QMP V6 PHY - USB/PCIe PCS registers */
+#define QPHY_V6_PCS_SW_RESET                   0x000
+#define QPHY_V6_PCS_PCS_STATUS1                        0x014
+#define QPHY_V6_PCS_POWER_DOWN_CONTROL         0x040
+#define QPHY_V6_PCS_START_CONTROL              0x044
 #define QPHY_V6_PCS_POWER_STATE_CONFIG1                0x090
 #define QPHY_V6_PCS_LOCK_DETECT_CONFIG1                0x0c4
 #define QPHY_V6_PCS_LOCK_DETECT_CONFIG2                0x0c8