arm64: dts: rockchip: add i2s_8ch_2 and i2s_8ch_3 to rk3308

These are I2S engines internally connected to the built-in audio codec.

Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Link: https://lore.kernel.org/r/20240305-rk3308-audio-codec-v4-6-312acdbe628f@bootlin.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index cfc0a87b5195930d0527ba49a8b2995042538184..662c55fe9b7759d769112f6905f655bbdf55af97 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -578,6 +578,48 @@
                #dma-cells = <1>;
        };
 
+       /*
+        * - can be clock producer or consumer
+        * - up to 8 capture channels and 2 playback channels
+        * - connected internally to audio codec
+        */
+       i2s_8ch_2: i2s@ff320000 {
+               compatible = "rockchip,rk3308-i2s-tdm";
+               reg = <0x0 0xff320000 0x0 0x1000>;
+               interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+               clock-names = "mclk_tx", "mclk_rx", "hclk";
+               clocks = <&cru SCLK_I2S2_8CH_TX>,
+                        <&cru SCLK_I2S2_8CH_RX>,
+                        <&cru HCLK_I2S2_8CH>;
+               dmas = <&dmac1 5>, <&dmac1 4>;
+               dma-names = "rx", "tx";
+               resets = <&cru SRST_I2S2_8CH_TX_M>, <&cru SRST_I2S2_8CH_RX_M>;
+               reset-names = "tx-m", "rx-m";
+               rockchip,grf = <&grf>;
+               status = "disabled";
+       };
+
+       /*
+        * - can be clock consumer only
+        * - up to 4 capture channels, no playback
+        * - connected internally to audio codec
+        */
+       i2s_8ch_3: i2s@ff330000 {
+               compatible = "rockchip,rk3308-i2s-tdm";
+               reg = <0x0 0xff330000 0x0 0x1000>;
+               interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+               clock-names = "mclk_tx", "mclk_rx", "hclk";
+               clocks = <&cru SCLK_I2S3_8CH_TX>,
+                        <&cru SCLK_I2S3_8CH_RX>,
+                        <&cru HCLK_I2S3_8CH>;
+               dmas = <&dmac1 7>;
+               dma-names = "rx";
+               resets = <&cru SRST_I2S3_8CH_TX_M>, <&cru SRST_I2S3_8CH_RX_M>;
+               reset-names = "tx-m", "rx-m";
+               rockchip,grf = <&grf>;
+               status = "disabled";
+       };
+
        i2s_2ch_0: i2s@ff350000 {
                compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
                reg = <0x0 0xff350000 0x0 0x1000>;