arm64: zynqmp: Enable xlnx,zynqmp-dwc3 driver for xilinx boards
authorMichal Simek <michal.simek@xilinx.com>
Fri, 6 Aug 2021 10:12:07 +0000 (12:12 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 13 Sep 2021 06:55:56 +0000 (08:55 +0200)
The commit 84770f028fab ("usb: dwc3: Add driver for Xilinx platforms")
finally add proper support for Xilinx dwc3 driver. This patch is adding DT
description for it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michael Tretter <m.tretter@pengutronix.de>
Link: https://lore.kernel.org/r/640a3bc0dc3e32560d3e84c2f78b5ae561396eb0.1628244703.git.michal.simek@xilinx.com
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
arch/arm64/boot/dts/xilinx/zynqmp.dtsi

index d93fe2efa39df01be1bde7a0e2efafde945ee431..b05be2552826574b787782689b63c3bf5723f275 100644 (file)
@@ -27,6 +27,7 @@
                rtc0 = &rtc;
                serial0 = &uart0;
                spi0 = &qspi;
+               usb0 = &usb0;
        };
 
        chosen {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb0_default>;
-       dr_mode = "host";
        phy-names = "usb3-phy";
        phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
+};
+
+&dwc3_0 {
+       status = "okay";
+       dr_mode = "host";
+       snps,usb3_lpm_capable;
        maximum-speed = "super-speed";
 };
 
index cd61550c52e5f507fdc9ec40db80b7ab309ed923..938b76bd052742c7fa9977e59918fe52ba33dead 100644 (file)
@@ -26,6 +26,7 @@
                serial1 = &uart1;
                spi0 = &spi0;
                spi1 = &spi1;
+               usb0 = &usb1;
        };
 
        chosen {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb1_default>;
+};
+
+&dwc3_1 {
+       status = "okay";
        dr_mode = "host";
+       snps,usb3_lpm_capable;
+       maximum-speed = "super-speed";
 };
 
 &uart0 {
index ba7f1f21c579ad975e8dfa665cb8546acc44f2e7..4394ec3b6a23969fc779139f630e1b4a5924b4a2 100644 (file)
@@ -24,6 +24,8 @@
                rtc0 = &rtc;
                serial0 = &uart0;
                serial1 = &uart1;
+               usb0 = &usb0;
+               usb1 = &usb1;
        };
 
        chosen {
 
 &usb0 {
        status = "okay";
+};
+
+&dwc3_0 {
+       status = "okay";
        dr_mode = "host";
+       snps,usb3_lpm_capable;
+       maximum-speed = "super-speed";
 };
 
 /* ULPI SMSC USB3320 */
 &usb1 {
        status = "okay";
+};
+
+&dwc3_1 {
+       status = "okay";
        dr_mode = "host";
+       snps,usb3_lpm_capable;
+       maximum-speed = "super-speed";
 };
index 80415e20281499a05e0a22e37b7ae838edc612a3..f6aad4159ccd3b6b30a30d6a07b390f525472325 100644 (file)
@@ -30,6 +30,8 @@
                serial2 = &dcc;
                spi0 = &spi0;
                spi1 = &spi1;
+               usb0 = &usb0;
+               usb1 = &usb1;
                mmc0 = &sdhci0;
                mmc1 = &sdhci1;
        };
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb0_default>;
-       dr_mode = "peripheral";
        phy-names = "usb3-phy";
        phys = <&psgtr 2 PHY_TYPE_USB3 0 0>;
+};
+
+&dwc3_0 {
+       status = "okay";
+       dr_mode = "peripheral";
        maximum-speed = "super-speed";
 };
 
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb1_default>;
-       dr_mode = "host";
        phy-names = "usb3-phy";
        phys = <&psgtr 3 PHY_TYPE_USB3 1 0>;
+};
+
+&dwc3_1 {
+       status = "okay";
+       dr_mode = "host";
        maximum-speed = "super-speed";
 };
 
index 3d8d14ef1ede8a2f3cc612ab9563aff2dd0897a0..7b9a88b125d1b28c11554225f43fadf6005828a1 100644 (file)
@@ -31,6 +31,7 @@
                serial1 = &uart1;
                serial2 = &dcc;
                spi0 = &qspi;
+               usb0 = &usb0;
        };
 
        chosen {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb0_default>;
-       dr_mode = "host";
        phy-names = "usb3-phy";
        phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
+};
+
+&dwc3_0 {
+       status = "okay";
+       dr_mode = "host";
+       snps,usb3_lpm_capable;
        maximum-speed = "super-speed";
 };
 
index 86fff3632c7d686a4169fa5ebc7467300f9e419b..bd8f20f3223d7e5d127e0116739f0b041e799eb3 100644 (file)
@@ -29,6 +29,7 @@
                serial1 = &uart1;
                serial2 = &dcc;
                spi0 = &qspi;
+               usb0 = &usb0;
        };
 
        chosen {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb0_default>;
-       dr_mode = "host";
        phy-names = "usb3-phy";
        phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
+};
+
+&dwc3_0 {
+       status = "okay";
+       dr_mode = "host";
+       snps,usb3_lpm_capable;
        maximum-speed = "super-speed";
 };
 
index 2a872d439804d4db9b6226737e4482770a3e821e..96feaad30166345b2269595adb3665360c121318 100644 (file)
@@ -29,6 +29,7 @@
                serial1 = &uart1;
                serial2 = &dcc;
                spi0 = &qspi;
+               usb0 = &usb0;
        };
 
        chosen {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb0_default>;
-       dr_mode = "host";
        phy-names = "usb3-phy";
        phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
+};
+
+&dwc3_0 {
+       status = "okay";
+       dr_mode = "host";
+       snps,usb3_lpm_capable;
        maximum-speed = "super-speed";
 };
 
index 057c04352591c117e609a05bc6890f18e01e28a7..20b7c75bb1d3d03e8e5e273b88c43953bc73d34e 100644 (file)
@@ -31,6 +31,7 @@
                serial1 = &uart1;
                serial2 = &dcc;
                spi0 = &qspi;
+               usb0 = &usb0;
        };
 
        chosen {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb0_default>;
-       dr_mode = "host";
        phy-names = "usb3-phy";
        phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
+};
+
+&dwc3_0 {
+       status = "okay";
+       dr_mode = "host";
+       snps,usb3_lpm_capable;
        maximum-speed = "super-speed";
 };
 
index e1fff62a4cd568714f57c091afc16ab70a945a66..e36df6adbeeebc21359237add0f722d2c006bb80 100644 (file)
@@ -30,6 +30,7 @@
                serial0 = &uart0;
                serial1 = &dcc;
                spi0 = &qspi;
+               usb0 = &usb0;
        };
 
        chosen {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb0_default>;
-       dr_mode = "host";
        phy-names = "usb3-phy";
        phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
+};
+
+&dwc3_0 {
+       status = "okay";
+       dr_mode = "host";
+       snps,usb3_lpm_capable;
        maximum-speed = "super-speed";
 };
 
index b5fde9dddca5ce44ab4321e224ea6991f5a36511..74e66443e4cee994d94f8c69a453fe0163dfd57f 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * dts file for Xilinx ZynqMP
  *
- * (C) Copyright 2014 - 2019, Xilinx, Inc.
+ * (C) Copyright 2014 - 2021, Xilinx, Inc.
  *
  * Michal Simek <michal.simek@xilinx.com>
  *
                        power-domains = <&zynqmp_firmware PD_UART_1>;
                };
 
-               usb0: usb@fe200000 {
-                       compatible = "snps,dwc3";
+               usb0: usb@ff9d0000 {
+                       #address-cells = <2>;
+                       #size-cells = <2>;
                        status = "disabled";
-                       interrupt-parent = <&gic>;
-                       interrupts = <0 65 4>;
-                       reg = <0x0 0xfe200000 0x0 0x40000>;
-                       clock-names = "clk_xin", "clk_ahb";
+                       compatible = "xlnx,zynqmp-dwc3";
+                       reg = <0x0 0xff9d0000 0x0 0x100>;
+                       clock-names = "bus_clk", "ref_clk";
                        power-domains = <&zynqmp_firmware PD_USB_0>;
+                       resets = <&zynqmp_reset ZYNQMP_RESET_USB0_CORERESET>,
+                                <&zynqmp_reset ZYNQMP_RESET_USB0_HIBERRESET>,
+                                <&zynqmp_reset ZYNQMP_RESET_USB0_APB>;
+                       reset-names = "usb_crst", "usb_hibrst", "usb_apbrst";
+                       ranges;
+
+                       dwc3_0: usb@fe200000 {
+                               compatible = "snps,dwc3";
+                               reg = <0x0 0xfe200000 0x0 0x40000>;
+                               interrupt-parent = <&gic>;
+                               interrupt-names = "dwc_usb3", "otg";
+                               interrupts = <0 65 4>, <0 69 4>;
+                               #stream-id-cells = <1>;
+                               iommus = <&smmu 0x860>;
+                               snps,quirk-frame-length-adjustment = <0x20>;
+                               /* dma-coherent; */
+                       };
                };
 
-               usb1: usb@fe300000 {
-                       compatible = "snps,dwc3";
+               usb1: usb@ff9e0000 {
+                       #address-cells = <2>;
+                       #size-cells = <2>;
                        status = "disabled";
-                       interrupt-parent = <&gic>;
-                       interrupts = <0 70 4>;
-                       reg = <0x0 0xfe300000 0x0 0x40000>;
-                       clock-names = "clk_xin", "clk_ahb";
+                       compatible = "xlnx,zynqmp-dwc3";
+                       reg = <0x0 0xff9e0000 0x0 0x100>;
+                       clock-names = "bus_clk", "ref_clk";
                        power-domains = <&zynqmp_firmware PD_USB_1>;
+                       resets = <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>,
+                                <&zynqmp_reset ZYNQMP_RESET_USB1_HIBERRESET>,
+                                <&zynqmp_reset ZYNQMP_RESET_USB1_APB>;
+                       reset-names = "usb_crst", "usb_hibrst", "usb_apbrst";
+                       ranges;
+
+                       dwc3_1: usb@fe300000 {
+                               compatible = "snps,dwc3";
+                               reg = <0x0 0xfe300000 0x0 0x40000>;
+                               interrupt-parent = <&gic>;
+                               interrupt-names = "dwc_usb3", "otg";
+                               interrupts = <0 70 4>, <0 74 4>;
+                               #stream-id-cells = <1>;
+                               iommus = <&smmu 0x861>;
+                               snps,quirk-frame-length-adjustment = <0x20>;
+                               /* dma-coherent; */
+                       };
                };
 
                watchdog0: watchdog@fd4d0000 {