SGTL5000_INT_OSC_EN);
                /* Enable VDDC charge pump */
                ana_pwr |= SGTL5000_VDDC_CHRGPMP_POWERUP;
-       } else if (vddio >= 3100 && vdda >= 3100) {
+       } else {
                ana_pwr &= ~SGTL5000_VDDC_CHRGPMP_POWERUP;
-               /* VDDC use VDDIO rail */
-               lreg_ctrl |= SGTL5000_VDDC_ASSN_OVRD;
-               lreg_ctrl |= SGTL5000_VDDC_MAN_ASSN_VDDIO <<
-                           SGTL5000_VDDC_MAN_ASSN_SHIFT;
+               /*
+                * if vddio == vdda the source of charge pump should be
+                * assigned manually to VDDIO
+                */
+               if (vddio == vdda) {
+                       lreg_ctrl |= SGTL5000_VDDC_ASSN_OVRD;
+                       lreg_ctrl |= SGTL5000_VDDC_MAN_ASSN_VDDIO <<
+                                   SGTL5000_VDDC_MAN_ASSN_SHIFT;
+               }
        }
 
        snd_soc_component_write(component, SGTL5000_CHIP_LINREG_CTRL, lreg_ctrl);