net/mlx5: Add firmware support for MTUTC scaled_ppm frequency adjustments

When device is capable of handling scaled ppm values for adjusting
frequency, conversion to ppb will not be done by the driver. Instead, the
scaled ppm value will be passed directly to the device for the frequency
adjustment operation.

Signed-off-by: Rahul Rameshbabu <rrameshbabu@nvidia.com>
Reviewed-by: Gal Pressman <gal@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
index 75510a12ab02606078c778bc479f3d9462d3da8c..4c9a402110595ae81dee2a3ea87fd48f402d59d4 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
@@ -362,7 +362,7 @@ static int mlx5_ptp_adjphase(struct ptp_clock_info *ptp, s32 delta)
        return mlx5_ptp_adjtime(ptp, delta);
 }
 
-static int mlx5_ptp_adjfreq_real_time(struct mlx5_core_dev *mdev, s32 freq)
+static int mlx5_ptp_freq_adj_real_time(struct mlx5_core_dev *mdev, long scaled_ppm)
 {
        u32 in[MLX5_ST_SZ_DW(mtutc_reg)] = {};
 
@@ -370,7 +370,15 @@ static int mlx5_ptp_adjfreq_real_time(struct mlx5_core_dev *mdev, s32 freq)
                return 0;
 
        MLX5_SET(mtutc_reg, in, operation, MLX5_MTUTC_OPERATION_ADJUST_FREQ_UTC);
-       MLX5_SET(mtutc_reg, in, freq_adjustment, freq);
+
+       if (MLX5_CAP_MCAM_FEATURE(mdev, mtutc_freq_adj_units)) {
+               MLX5_SET(mtutc_reg, in, freq_adj_units,
+                        MLX5_MTUTC_FREQ_ADJ_UNITS_SCALED_PPM);
+               MLX5_SET(mtutc_reg, in, freq_adjustment, scaled_ppm);
+       } else {
+               MLX5_SET(mtutc_reg, in, freq_adj_units, MLX5_MTUTC_FREQ_ADJ_UNITS_PPB);
+               MLX5_SET(mtutc_reg, in, freq_adjustment, scaled_ppm_to_ppb(scaled_ppm));
+       }
 
        return mlx5_set_mtutc(mdev, in, sizeof(in));
 }
@@ -385,7 +393,8 @@ static int mlx5_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
        int err;
 
        mdev = container_of(clock, struct mlx5_core_dev, clock);
-       err = mlx5_ptp_adjfreq_real_time(mdev, scaled_ppm_to_ppb(scaled_ppm));
+
+       err = mlx5_ptp_freq_adj_real_time(mdev, scaled_ppm);
        if (err)
                return err;
 

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 1b6201bb04c17efab6d581cdfb9141bcf8be4245..7cf6a78fea07f542baf65abd98f11e42009cd765 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -9925,6 +9925,11 @@ struct mlx5_ifc_mpegc_reg_bits {
        u8         reserved_at_60[0x100];
 };
 
+enum {
+       MLX5_MTUTC_FREQ_ADJ_UNITS_PPB          = 0x0,
+       MLX5_MTUTC_FREQ_ADJ_UNITS_SCALED_PPM   = 0x1,
+};
+
 enum {
        MLX5_MTUTC_OPERATION_SET_TIME_IMMEDIATE   = 0x1,
        MLX5_MTUTC_OPERATION_ADJUST_TIME          = 0x2,
@@ -9932,7 +9937,9 @@ enum {
 };
 
 struct mlx5_ifc_mtutc_reg_bits {
-       u8         reserved_at_0[0x1c];
+       u8         reserved_at_0[0x5];
+       u8         freq_adj_units[0x3];
+       u8         reserved_at_8[0x14];
        u8         operation[0x4];
 
        u8         freq_adjustment[0x20];
@@ -10005,7 +10012,8 @@ struct mlx5_ifc_pcam_reg_bits {
 };
 
 struct mlx5_ifc_mcam_enhanced_features_bits {
-       u8         reserved_at_0[0x51];
+       u8         reserved_at_0[0x50];
+       u8         mtutc_freq_adj_units[0x1];
        u8         mtutc_time_adjustment_extended_range[0x1];
        u8         reserved_at_52[0xb];
        u8         mcia_32dwords[0x1];