drm/amdgpu: add AMDGPU_VM_NOALLOC v2

Add the AMDGPU_VM_NOALLOC flag to let userspace control MALL allocation.

v2: also add the flag to the allowed flags.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 56f4c9aa87c67e803a0698d68dec5635bc3fe677..8ef31d687ef3b26352ce69802b2d576f7096f534 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -645,6 +645,8 @@ uint64_t amdgpu_gem_va_map_flags(struct amdgpu_device *adev, uint32_t flags)
                pte_flag |= AMDGPU_PTE_WRITEABLE;
        if (flags & AMDGPU_VM_PAGE_PRT)
                pte_flag |= AMDGPU_PTE_PRT;
+       if (flags & AMDGPU_VM_PAGE_NOALLOC)
+               pte_flag |= AMDGPU_PTE_NOALLOC;
 
        if (adev->gmc.gmc_funcs->map_mtype)
                pte_flag |= amdgpu_gmc_map_mtype(adev,
@@ -658,7 +660,8 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
 {
        const uint32_t valid_flags = AMDGPU_VM_DELAY_UPDATE |
                AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE |
-               AMDGPU_VM_PAGE_EXECUTABLE | AMDGPU_VM_MTYPE_MASK;
+               AMDGPU_VM_PAGE_EXECUTABLE | AMDGPU_VM_MTYPE_MASK |
+               AMDGPU_VM_PAGE_NOALLOC;
        const uint32_t prt_flags = AMDGPU_VM_DELAY_UPDATE |
                AMDGPU_VM_PAGE_PRT;
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index b8c79789e1e49457736039f001df892566a7342c..9077dfccaf3cf95ce3577837c5911da24f687419 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -613,6 +613,9 @@ static void gmc_v10_0_get_vm_pte(struct amdgpu_device *adev,
        *flags &= ~AMDGPU_PTE_MTYPE_NV10_MASK;
        *flags |= (mapping->flags & AMDGPU_PTE_MTYPE_NV10_MASK);
 
+       *flags &= ~AMDGPU_PTE_NOALLOC;
+       *flags |= (mapping->flags & AMDGPU_PTE_NOALLOC);
+
        if (mapping->flags & AMDGPU_PTE_PRT) {
                *flags |= AMDGPU_PTE_PRT;
                *flags |= AMDGPU_PTE_SNOOPED;

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index 477f67d9b07cb2156bba483ba1bac4635c5012a8..a0c0b7d9f444dde338b133134bd99c8a749ed2c9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -500,6 +500,9 @@ static void gmc_v11_0_get_vm_pte(struct amdgpu_device *adev,
        *flags &= ~AMDGPU_PTE_MTYPE_NV10_MASK;
        *flags |= (mapping->flags & AMDGPU_PTE_MTYPE_NV10_MASK);
 
+       *flags &= ~AMDGPU_PTE_NOALLOC;
+       *flags |= (mapping->flags & AMDGPU_PTE_NOALLOC);
+
        if (mapping->flags & AMDGPU_PTE_PRT) {
                *flags |= AMDGPU_PTE_PRT;
                *flags |= AMDGPU_PTE_SNOOPED;

diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index a81bef5cfeaa13e02e7fcc1a974de5728625d707..18d3246d636ef9efd26dc08af5eab33dc7669997 100644 (file)
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -533,6 +533,8 @@ struct drm_amdgpu_gem_op {
 #define AMDGPU_VM_MTYPE_UC             (4 << 5)
 /* Use Read Write MTYPE instead of default MTYPE */
 #define AMDGPU_VM_MTYPE_RW             (5 << 5)
+/* don't allocate MALL */
+#define AMDGPU_VM_PAGE_NOALLOC         (1 << 9)
 
 struct drm_amdgpu_gem_va {
        /** GEM object handle */