case USB_PORT_FEAT_U1_TIMEOUT:
                        if (hcd->speed != HCD_USB3)
                                goto error;
-                       temp = xhci_readl(xhci, port_array[wIndex] + 1);
+                       temp = xhci_readl(xhci, port_array[wIndex] + PORTPMSC);
                        temp &= ~PORT_U1_TIMEOUT_MASK;
                        temp |= PORT_U1_TIMEOUT(timeout);
-                       xhci_writel(xhci, temp, port_array[wIndex] + 1);
+                       xhci_writel(xhci, temp, port_array[wIndex] + PORTPMSC);
                        break;
                case USB_PORT_FEAT_U2_TIMEOUT:
                        if (hcd->speed != HCD_USB3)
                                goto error;
-                       temp = xhci_readl(xhci, port_array[wIndex] + 1);
+                       temp = xhci_readl(xhci, port_array[wIndex] + PORTPMSC);
                        temp &= ~PORT_U2_TIMEOUT_MASK;
                        temp |= PORT_U2_TIMEOUT(timeout);
-                       xhci_writel(xhci, temp, port_array[wIndex] + 1);
+                       xhci_writel(xhci, temp, port_array[wIndex] + PORTPMSC);
                        break;
                default:
                        goto error;
                        __le32 __iomem *addr;
                        u32 tmp;
 
-                       /* Add one to the port status register address to get
-                        * the port power control register address.
-                        */
-                       addr = port_array[port_index] + 1;
+                       /* Get the port power control register address. */
+                       addr = port_array[port_index] + PORTPMSC;
                        tmp = xhci_readl(xhci, addr);
                        tmp |= PORT_RWE;
                        xhci_writel(xhci, tmp, addr);
                        /* Add one to the port status register address to get
                         * the port power control register address.
                         */
-                       addr = port_array[port_index] + 1;
+                       addr = port_array[port_index] + PORTPMSC;
                        tmp = xhci_readl(xhci, addr);
                        tmp &= ~PORT_RWE;
                        xhci_writel(xhci, tmp, addr);
 
         * Check device's USB 2.0 extension descriptor to determine whether
         * HIRD or BESL shoule be used. See USB2.0 LPM errata.
         */
-       pm_addr = port_array[port_num] + 1;
+       pm_addr = port_array[port_num] + PORTPMSC;
        hird = xhci_calculate_hird_besl(xhci, udev);
        temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
        xhci_writel(xhci, temp, pm_addr);
 
        port_array = xhci->usb2_ports;
        port_num = udev->portnum - 1;
-       pm_addr = port_array[port_num] + 1;
+       pm_addr = port_array[port_num] + PORTPMSC;
        temp = xhci_readl(xhci, pm_addr);
 
        xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",