drm/xe/irq: Don't clobber display interrupts on multi-tile platforms
authorMatt Roper <matthew.d.roper@intel.com>
Sat, 1 Apr 2023 00:21:06 +0000 (17:21 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 19 Dec 2023 23:31:31 +0000 (18:31 -0500)
Although our only multi-tile platform today (PVC) doesn't support
display, it's possible that some future multi-tile platform will.
If/when this happens, display interrupts (both traditional display and
ASLE backlight interrupts raised as a Gunit interrupt) should be
delivered to the primary tile.  Save away tile0's master_ctl value so
that it can still be used for display interrupt handling after the GT
loop.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20230401002106.588656-9-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/xe_irq.c

index 62ecd71be063baf45f564ac89c7d0cc0168e1822..e812a5b66a6b66f5d5d815d5364b56f6e2717146 100644 (file)
@@ -350,7 +350,7 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
 {
        struct xe_device *xe = arg;
        struct xe_gt *gt;
-       u32 master_tile_ctl, master_ctl = 0, gu_misc_iir;
+       u32 master_tile_ctl, master_ctl = 0, tile0_master_ctl = 0, gu_misc_iir;
        long unsigned int intr_dw[2];
        u32 identity[32];
        u8 id;
@@ -384,9 +384,17 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
                if (!xe_gt_is_media_type(gt))
                        xe_mmio_write32(gt, GFX_MSTR_IRQ.reg, master_ctl);
                gt_irq_handler(xe, gt, master_ctl, intr_dw, identity);
+
+               /*
+                * Save primary tile's master interrupt register for display
+                * processing below.
+                */
+               if (id == 0)
+                       tile0_master_ctl = master_ctl;
        }
 
-       gu_misc_iir = gu_misc_irq_ack(gt, master_ctl);
+       /* Gunit GSE interrupts can trigger display backlight operations */
+       gu_misc_iir = gu_misc_irq_ack(gt, tile0_master_ctl);
 
        dg1_intr_enable(xe, false);