.end    = IRQ_MMC,
                .flags  = IORESOURCE_IRQ,
        },
-       [2] = {
-               .start  = 21,
-               .end    = 21,
-               .flags  = IORESOURCE_DMA,
-       },
-       [3] = {
-               .start  = 22,
-               .end    = 22,
-               .flags  = IORESOURCE_DMA,
-       },
 };
 
 static u64 pxamci_dmamask = 0xffffffffUL;
                .end    = 0x40700023,
                .flags  = IORESOURCE_MEM,
        },
-       [5] = {
-               .start  = 17,
-               .end    = 17,
-               .flags  = IORESOURCE_DMA,
-       },
-       [6] = {
-               .start  = 18,
-               .end    = 18,
-               .flags  = IORESOURCE_DMA,
-       },
 };
 
 struct platform_device pxa_device_ficp = {
                .end    = IRQ_SSP,
                .flags  = IORESOURCE_IRQ,
        },
-       [2] = {
-               /* DRCMR for RX */
-               .start  = 13,
-               .end    = 13,
-               .flags  = IORESOURCE_DMA,
-       },
-       [3] = {
-               /* DRCMR for TX */
-               .start  = 14,
-               .end    = 14,
-               .flags  = IORESOURCE_DMA,
-       },
 };
 
 struct platform_device pxa25x_device_ssp = {
                .end    = IRQ_NSSP,
                .flags  = IORESOURCE_IRQ,
        },
-       [2] = {
-               /* DRCMR for RX */
-               .start  = 15,
-               .end    = 15,
-               .flags  = IORESOURCE_DMA,
-       },
-       [3] = {
-               /* DRCMR for TX */
-               .start  = 16,
-               .end    = 16,
-               .flags  = IORESOURCE_DMA,
-       },
 };
 
 struct platform_device pxa25x_device_nssp = {
                .end    = IRQ_ASSP,
                .flags  = IORESOURCE_IRQ,
        },
-       [2] = {
-               /* DRCMR for RX */
-               .start  = 23,
-               .end    = 23,
-               .flags  = IORESOURCE_DMA,
-       },
-       [3] = {
-               /* DRCMR for TX */
-               .start  = 24,
-               .end    = 24,
-               .flags  = IORESOURCE_DMA,
-       },
 };
 
 struct platform_device pxa25x_device_assp = {
                .end    = IRQ_SSP,
                .flags  = IORESOURCE_IRQ,
        },
-       [2] = {
-               /* DRCMR for RX */
-               .start  = 13,
-               .end    = 13,
-               .flags  = IORESOURCE_DMA,
-       },
-       [3] = {
-               /* DRCMR for TX */
-               .start  = 14,
-               .end    = 14,
-               .flags  = IORESOURCE_DMA,
-       },
 };
 
 struct platform_device pxa27x_device_ssp1 = {
                .end    = IRQ_SSP2,
                .flags  = IORESOURCE_IRQ,
        },
-       [2] = {
-               /* DRCMR for RX */
-               .start  = 15,
-               .end    = 15,
-               .flags  = IORESOURCE_DMA,
-       },
-       [3] = {
-               /* DRCMR for TX */
-               .start  = 16,
-               .end    = 16,
-               .flags  = IORESOURCE_DMA,
-       },
 };
 
 struct platform_device pxa27x_device_ssp2 = {
                .end    = IRQ_SSP3,
                .flags  = IORESOURCE_IRQ,
        },
-       [2] = {
-               /* DRCMR for RX */
-               .start  = 66,
-               .end    = 66,
-               .flags  = IORESOURCE_DMA,
-       },
-       [3] = {
-               /* DRCMR for TX */
-               .start  = 67,
-               .end    = 67,
-               .flags  = IORESOURCE_DMA,
-       },
 };
 
 struct platform_device pxa27x_device_ssp3 = {
                .end    = IRQ_MMC2,
                .flags  = IORESOURCE_IRQ,
        },
-       [2] = {
-               .start  = 93,
-               .end    = 93,
-               .flags  = IORESOURCE_DMA,
-       },
-       [3] = {
-               .start  = 94,
-               .end    = 94,
-               .flags  = IORESOURCE_DMA,
-       },
 };
 
 struct platform_device pxa3xx_device_mci2 = {
                .end    = IRQ_MMC3,
                .flags  = IORESOURCE_IRQ,
        },
-       [2] = {
-               .start  = 100,
-               .end    = 100,
-               .flags  = IORESOURCE_DMA,
-       },
-       [3] = {
-               .start  = 101,
-               .end    = 101,
-               .flags  = IORESOURCE_DMA,
-       },
 };
 
 struct platform_device pxa3xx_device_mci3 = {
                .end    = IRQ_NAND,
                .flags  = IORESOURCE_IRQ,
        },
-       [2] = {
-               /* DRCMR for Data DMA */
-               .start  = 97,
-               .end    = 97,
-               .flags  = IORESOURCE_DMA,
-       },
-       [3] = {
-               /* DRCMR for Command DMA */
-               .start  = 99,
-               .end    = 99,
-               .flags  = IORESOURCE_DMA,
-       },
 };
 
 static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
                .end    = IRQ_SSP4,
                .flags  = IORESOURCE_IRQ,
        },
-       [2] = {
-               /* DRCMR for RX */
-               .start  = 2,
-               .end    = 2,
-               .flags  = IORESOURCE_DMA,
-       },
-       [3] = {
-               /* DRCMR for TX */
-               .start  = 3,
-               .end    = 3,
-               .flags  = IORESOURCE_DMA,
-       },
 };
 
 /*