pinctrl: renesas: r8a77951: Optimize pinctrl image size for R8A774E1
authorBiju Das <biju.das.jz@bp.renesas.com>
Mon, 19 Oct 2020 12:42:53 +0000 (13:42 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 13 Nov 2020 14:37:34 +0000 (15:37 +0100)
This driver supports both RZ/G2H and R-Car H3 ES2 SoCs.
Optimize pinctrl image size for RZ/G2H, when support for R-Car H3 ES2
(R8A77951) is not enabled.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20201019124258.4574-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/renesas/pfc-r8a77951.c

index a94ebe0bf5d0612740729defd997c2602e00eb3b..8d1262c170af0085a2db1d3144c81f3f96af22e0 100644 (file)
@@ -1827,6 +1827,7 @@ static const unsigned int canfd1_data_mux[] = {
        CANFD1_TX_MARK,         CANFD1_RX_MARK,
 };
 
+#ifdef CONFIG_PINCTRL_PFC_R8A77951
 /* - DRIF0 --------------------------------------------------------------- */
 static const unsigned int drif0_ctrl_a_pins[] = {
        /* CLK, SYNC */
@@ -2041,6 +2042,7 @@ static const unsigned int drif3_data1_b_pins[] = {
 static const unsigned int drif3_data1_b_mux[] = {
        RIF3_D1_B_MARK,
 };
+#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
 
 /* - DU --------------------------------------------------------------------- */
 static const unsigned int du_rgb666_pins[] = {
@@ -4159,7 +4161,9 @@ static const unsigned int vin5_clk_mux[] = {
 
 static const struct {
        struct sh_pfc_pin_group common[320];
+#ifdef CONFIG_PINCTRL_PFC_R8A77951
        struct sh_pfc_pin_group automotive[30];
+#endif
 } pinmux_groups = {
        .common = {
                SH_PFC_PIN_GROUP(audio_clk_a_a),
@@ -4483,6 +4487,7 @@ static const struct {
                SH_PFC_PIN_GROUP(vin5_clkenb),
                SH_PFC_PIN_GROUP(vin5_clk),
        },
+#ifdef CONFIG_PINCTRL_PFC_R8A77951
        .automotive = {
                SH_PFC_PIN_GROUP(drif0_ctrl_a),
                SH_PFC_PIN_GROUP(drif0_data0_a),
@@ -4515,7 +4520,7 @@ static const struct {
                SH_PFC_PIN_GROUP(drif3_data0_b),
                SH_PFC_PIN_GROUP(drif3_data1_b),
        }
-
+#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
 };
 
 static const char * const audio_clk_groups[] = {
@@ -4574,6 +4579,7 @@ static const char * const canfd1_groups[] = {
        "canfd1_data",
 };
 
+#ifdef CONFIG_PINCTRL_PFC_R8A77951
 static const char * const drif0_groups[] = {
        "drif0_ctrl_a",
        "drif0_data0_a",
@@ -4615,6 +4621,7 @@ static const char * const drif3_groups[] = {
        "drif3_data0_b",
        "drif3_data1_b",
 };
+#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
 
 static const char * const du_groups[] = {
        "du_rgb666",
@@ -5041,7 +5048,9 @@ static const char * const vin5_groups[] = {
 
 static const struct {
        struct sh_pfc_function common[53];
+#ifdef CONFIG_PINCTRL_PFC_R8A77951
        struct sh_pfc_function automotive[4];
+#endif
 } pinmux_functions = {
        .common = {
                SH_PFC_FUNCTION(audio_clk),
@@ -5098,13 +5107,14 @@ static const struct {
                SH_PFC_FUNCTION(vin4),
                SH_PFC_FUNCTION(vin5),
        },
+#ifdef CONFIG_PINCTRL_PFC_R8A77951
        .automotive = {
                SH_PFC_FUNCTION(drif0),
                SH_PFC_FUNCTION(drif1),
                SH_PFC_FUNCTION(drif2),
                SH_PFC_FUNCTION(drif3),
        }
-
+#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
 };
 
 static const struct pinmux_cfg_reg pinmux_config_regs[] = {