[AMDGPU_HW_IP_VCN_JPEG] =       1,
 };
 
-static int amdgput_ctx_total_num_entities(void)
+static int amdgpu_ctx_total_num_entities(void)
 {
        unsigned i, num_entities = 0;
 
                           struct drm_file *filp,
                           struct amdgpu_ctx *ctx)
 {
-       unsigned num_entities = amdgput_ctx_total_num_entities();
+       unsigned num_entities = amdgpu_ctx_total_num_entities();
        unsigned i, j, k;
        int r;
 
 static void amdgpu_ctx_fini(struct kref *ref)
 {
        struct amdgpu_ctx *ctx = container_of(ref, struct amdgpu_ctx, refcount);
-       unsigned num_entities = amdgput_ctx_total_num_entities();
+       unsigned num_entities = amdgpu_ctx_total_num_entities();
        struct amdgpu_device *adev = ctx->adev;
        unsigned i, j;
 
 void amdgpu_ctx_priority_override(struct amdgpu_ctx *ctx,
                                  enum drm_sched_priority priority)
 {
-       unsigned num_entities = amdgput_ctx_total_num_entities();
+       unsigned num_entities = amdgpu_ctx_total_num_entities();
        enum drm_sched_priority ctx_prio;
        unsigned i;
 
 
 long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout)
 {
-       unsigned num_entities = amdgput_ctx_total_num_entities();
+       unsigned num_entities = amdgpu_ctx_total_num_entities();
        struct amdgpu_ctx *ctx;
        struct idr *idp;
        uint32_t id, i;
 
 void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr)
 {
-       unsigned num_entities = amdgput_ctx_total_num_entities();
+       unsigned num_entities = amdgpu_ctx_total_num_entities();
        struct amdgpu_ctx *ctx;
        struct idr *idp;
        uint32_t id, i;