bnxt_en: Increase firmware message response DMA wait time
authorMichael Chan <michael.chan@broadcom.com>
Sun, 20 Feb 2022 09:05:52 +0000 (04:05 -0500)
committerDavid S. Miller <davem@davemloft.net>
Sun, 20 Feb 2022 13:47:15 +0000 (13:47 +0000)
When polling for the firmware message response, we first poll for the
response message header.  Once the valid length is detected in the
header, we poll for the valid bit at the end of the message which
signals DMA completion.  Normally, this poll time for DMA completion
is extremely short (0 to a few usec).  But on some devices under some
rare conditions, it can be up to about 20 msec.

Increase this delay to 50 msec and use udelay() for the first 10 usec
for the common case, and usleep_range() beyond that.

Also, change the error message to include the above delay time when
printing the timeout value.

Fixes: 3c8c20db769c ("bnxt_en: move HWRM API implementation into separate file")
Reviewed-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.c
drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.h

index 566c9487ef556d457471310d6ea809057b90e104..b01d42928a53c5594f5d92cc09cbbb2a050ad6f6 100644 (file)
@@ -644,17 +644,23 @@ static int __hwrm_send(struct bnxt *bp, struct bnxt_hwrm_ctx *ctx)
 
                /* Last byte of resp contains valid bit */
                valid = ((u8 *)ctx->resp) + len - 1;
-               for (j = 0; j < HWRM_VALID_BIT_DELAY_USEC; j++) {
+               for (j = 0; j < HWRM_VALID_BIT_DELAY_USEC; ) {
                        /* make sure we read from updated DMA memory */
                        dma_rmb();
                        if (*valid)
                                break;
-                       usleep_range(1, 5);
+                       if (j < 10) {
+                               udelay(1);
+                               j++;
+                       } else {
+                               usleep_range(20, 30);
+                               j += 20;
+                       }
                }
 
                if (j >= HWRM_VALID_BIT_DELAY_USEC) {
                        hwrm_err(bp, ctx, "Error (timeout: %u) msg {0x%x 0x%x} len:%d v:%d\n",
-                                hwrm_total_timeout(i), req_type,
+                                hwrm_total_timeout(i) + j, req_type,
                                 le16_to_cpu(ctx->req->seq_id), len, *valid);
                        goto exit;
                }
index d52bd2d63aec060ed218c0510959afd3ba58a9ee..c98032e381881da718a1f55659258e8ebc11a5cb 100644 (file)
@@ -90,7 +90,7 @@ static inline unsigned int hwrm_total_timeout(unsigned int n)
 }
 
 
-#define HWRM_VALID_BIT_DELAY_USEC      150
+#define HWRM_VALID_BIT_DELAY_USEC      50000
 
 static inline bool bnxt_cfa_hwrm_message(u16 req_type)
 {