x86/cpufeatures: Add SGX1 and SGX2 sub-features
authorSean Christopherson <seanjc@google.com>
Fri, 19 Mar 2021 07:22:18 +0000 (20:22 +1300)
committerBorislav Petkov <bp@suse.de>
Thu, 25 Mar 2021 16:33:11 +0000 (17:33 +0100)
Add SGX1 and SGX2 feature flags, via CPUID.0x12.0x0.EAX, as scattered
features, since adding a new leaf for only two bits would be wasteful.
As part of virtualizing SGX, KVM will expose the SGX CPUID leafs to its
guest, and to do so correctly needs to query hardware and kernel support
for SGX1 and SGX2.

Suppress both SGX1 and SGX2 from /proc/cpuinfo. SGX1 basically means
SGX, and for SGX2 there is no concrete use case of using it in
/proc/cpuinfo.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Kai Huang <kai.huang@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Dave Hansen <dave.hansen@intel.com>
Acked-by: Jarkko Sakkinen <jarkko@kernel.org>
Link: https://lkml.kernel.org/r/d787827dbfca6b3210ac3e432e3ac1202727e786.1616136308.git.kai.huang@intel.com
arch/x86/include/asm/cpufeatures.h
arch/x86/kernel/cpu/cpuid-deps.c
arch/x86/kernel/cpu/scattered.c

index cc96e26d69f7ae9fa04ccdbc35d1f72f93d735a2..1f918f5e005596a78028dca14b389543389c3f3f 100644 (file)
 #define X86_FEATURE_FENCE_SWAPGS_KERNEL        (11*32+ 5) /* "" LFENCE in kernel entry SWAPGS path */
 #define X86_FEATURE_SPLIT_LOCK_DETECT  (11*32+ 6) /* #AC for split lock */
 #define X86_FEATURE_PER_THREAD_MBA     (11*32+ 7) /* "" Per-thread Memory Bandwidth Allocation */
+#define X86_FEATURE_SGX1               (11*32+ 8) /* "" Basic SGX */
+#define X86_FEATURE_SGX2               (11*32+ 9) /* "" SGX Enclave Dynamic Memory Management (EDMM) */
 
 /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
 #define X86_FEATURE_AVX_VNNI           (12*32+ 4) /* AVX VNNI instructions */
index d40f8e0a54ce2c211a4277f30534952844c6ef54..defda61f372df532dadf52dd452949135ee0881b 100644 (file)
@@ -73,6 +73,8 @@ static const struct cpuid_dep cpuid_deps[] = {
        { X86_FEATURE_ENQCMD,                   X86_FEATURE_XSAVES    },
        { X86_FEATURE_PER_THREAD_MBA,           X86_FEATURE_MBA       },
        { X86_FEATURE_SGX_LC,                   X86_FEATURE_SGX       },
+       { X86_FEATURE_SGX1,                     X86_FEATURE_SGX       },
+       { X86_FEATURE_SGX2,                     X86_FEATURE_SGX1      },
        {}
 };
 
index 972ec3bfa9c0cfc0a743d30f3fc01df7150b9b87..21d1f062895a8dfdf4c66ecbec8d91da3feadb5c 100644 (file)
@@ -36,6 +36,8 @@ static const struct cpuid_bit cpuid_bits[] = {
        { X86_FEATURE_CDP_L2,           CPUID_ECX,  2, 0x00000010, 2 },
        { X86_FEATURE_MBA,              CPUID_EBX,  3, 0x00000010, 0 },
        { X86_FEATURE_PER_THREAD_MBA,   CPUID_ECX,  0, 0x00000010, 3 },
+       { X86_FEATURE_SGX1,             CPUID_EAX,  0, 0x00000012, 0 },
+       { X86_FEATURE_SGX2,             CPUID_EAX,  1, 0x00000012, 0 },
        { X86_FEATURE_HW_PSTATE,        CPUID_EDX,  7, 0x80000007, 0 },
        { X86_FEATURE_CPB,              CPUID_EDX,  9, 0x80000007, 0 },
        { X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },