{
        struct dw_spi *dws = param;
 
-       return dws->dmac && (&dws->dmac->dev == chan->device->dev);
+       return dws->dma_dev == chan->device->dev;
 }
 
 static int mid_spi_dma_init(struct dw_spi *dws)
 {
        struct mid_dma *dw_dma = dws->dma_priv;
+       struct pci_dev *dma_dev;
        struct intel_mid_dma_slave *rxs, *txs;
        dma_cap_mask_t mask;
 
         * Get pci device for DMA controller, currently it could only
         * be the DMA controller of Medfield
         */
-       dws->dmac = pci_get_device(PCI_VENDOR_ID_INTEL, 0x0827, NULL);
+       dma_dev = pci_get_device(PCI_VENDOR_ID_INTEL, 0x0827, NULL);
+       if (!dma_dev)
+               return -ENODEV;
+
+       dws->dma_dev = &dma_dev->dev;
 
        dma_cap_zero(mask);
        dma_cap_set(DMA_SLAVE, mask);
 free_rxchan:
        dma_release_channel(dws->rxchan);
 err_exit:
-       return -1;
-
+       return -EBUSY;
 }
 
 static void mid_spi_dma_exit(struct dw_spi *dws)
 
        dma_addr_t              dma_addr; /* phy address of the Data register */
        struct dw_spi_dma_ops   *dma_ops;
        void                    *dma_priv; /* platform relate info */
-       struct pci_dev          *dmac;
 
        /* Bus interface info */
        void                    *priv;