firmware: qcom: scm: Modify only the download bits in TCSR register

Crashdump collection is done based on DLOAD bits of TCSR register.
To retain other bits, scm driver need to read the register and
modify only the DLOAD bits, as other bits in TCSR may have their
own significance.

Co-developed-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com>
Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com>
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Tested-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> # IPQ9574 and IPQ5332
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Elliot Berman <quic_eberman@quicinc.com>
Link: https://lore.kernel.org/r/1711042655-31948-1-git-send-email-quic_mojha@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c
index 84aa30b5a19e652582657b223f48eac137490223..5ff62f57aa55e93f468fdfe957b261b82397b56f 100644 (file)
--- a/drivers/firmware/qcom/qcom_scm.c
+++ b/drivers/firmware/qcom/qcom_scm.c
@@ -4,6 +4,8 @@
  */
 
 #include <linux/arm-smccc.h>
+#include <linux/bitfield.h>
+#include <linux/bits.h>
 #include <linux/clk.h>
 #include <linux/completion.h>
 #include <linux/cpumask.h>
@@ -114,6 +116,10 @@ static const u8 qcom_scm_cpu_warm_bits[QCOM_SCM_BOOT_MAX_CPUS] = {
 #define QCOM_SMC_WAITQ_FLAG_WAKE_ONE   BIT(0)
 #define QCOM_SMC_WAITQ_FLAG_WAKE_ALL   BIT(1)
 
+#define QCOM_DLOAD_MASK                GENMASK(5, 4)
+#define QCOM_DLOAD_NODUMP      0
+#define QCOM_DLOAD_FULLDUMP    1
+
 static const char * const qcom_scm_convention_names[] = {
        [SMC_CONVENTION_UNKNOWN] = "unknown",
        [SMC_CONVENTION_ARM_32] = "smc arm 32",
@@ -493,13 +499,29 @@ static int __qcom_scm_set_dload_mode(struct device *dev, bool enable)
        return qcom_scm_call_atomic(__scm->dev, &desc, NULL);
 }
 
+static int qcom_scm_io_rmw(phys_addr_t addr, unsigned int mask, unsigned int val)
+{
+       unsigned int old;
+       unsigned int new;
+       int ret;
+
+       ret = qcom_scm_io_readl(addr, &old);
+       if (ret)
+               return ret;
+
+       new = (old & ~mask) | (val & mask);
+
+       return qcom_scm_io_writel(addr, new);
+}
+
 static void qcom_scm_set_download_mode(bool enable)
 {
+       u32 val = enable ? QCOM_DLOAD_FULLDUMP : QCOM_DLOAD_NODUMP;
        int ret = 0;
 
        if (__scm->dload_mode_addr) {
-               ret = qcom_scm_io_writel(__scm->dload_mode_addr,
-                                        enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0);
+               ret = qcom_scm_io_rmw(__scm->dload_mode_addr, QCOM_DLOAD_MASK,
+                                     FIELD_PREP(QCOM_DLOAD_MASK, val));
        } else if (__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_BOOT,
                                                QCOM_SCM_BOOT_SET_DLOAD_MODE)) {
                ret = __qcom_scm_set_dload_mode(__scm->dev, enable);