#include <linux/clk.h>
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
 #include <linux/spi/spi.h>
 
 #include <mach/dma.h>
        while (!acquire_dma(sdd))
                msleep(10);
 
+       pm_runtime_get_sync(&sdd->pdev->dev);
+
        spin_lock_irqsave(&sdd->lock, flags);
 
        while (!list_empty(&sdd->queue)
        /* Free DMA channels */
        sdd->ops->release(sdd->rx_dma.ch, &s3c64xx_spi_dma_client);
        sdd->ops->release(sdd->tx_dma.ch, &s3c64xx_spi_dma_client);
+
+       pm_runtime_put(&sdd->pdev->dev);
 }
 
 static int s3c64xx_spi_transfer(struct spi_device *spi,
                goto setup_exit;
        }
 
+       pm_runtime_get_sync(&sdd->pdev->dev);
+
        /* Check if we can provide the requested rate */
        if (!sci->clk_from_cmu) {
                u32 psr, speed;
                        err = -EINVAL;
        }
 
+       pm_runtime_put(&sdd->pdev->dev);
+
 setup_exit:
 
        /* setup() returns with device de-selected */
                                        mem_res->end, mem_res->start,
                                        sdd->rx_dma.dmach, sdd->tx_dma.dmach);
 
+       pm_runtime_enable(&pdev->dev);
+
        return 0;
 
 err9:
        struct resource *mem_res;
        unsigned long flags;
 
+       pm_runtime_disable(&pdev->dev);
+
        spin_lock_irqsave(&sdd->lock, flags);
        sdd->state |= SUSPND;
        spin_unlock_irqrestore(&sdd->lock, flags);
 }
 #endif /* CONFIG_PM */
 
+#ifdef CONFIG_PM_RUNTIME
+static int s3c64xx_spi_runtime_suspend(struct device *dev)
+{
+       struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+       struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
+
+       clk_disable(sdd->clk);
+       clk_disable(sdd->src_clk);
+
+       return 0;
+}
+
+static int s3c64xx_spi_runtime_resume(struct device *dev)
+{
+       struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+       struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
+
+       clk_enable(sdd->src_clk);
+       clk_enable(sdd->clk);
+
+       return 0;
+}
+#endif /* CONFIG_PM_RUNTIME */
+
 static const struct dev_pm_ops s3c64xx_spi_pm = {
        SET_SYSTEM_SLEEP_PM_OPS(s3c64xx_spi_suspend, s3c64xx_spi_resume)
+       SET_RUNTIME_PM_OPS(s3c64xx_spi_runtime_suspend,
+                          s3c64xx_spi_runtime_resume, NULL)
 };
 
 static struct platform_driver s3c64xx_spi_driver = {