drivers/perf: riscv: Fix counter mask iteration for RV32

For RV32, used_hw_ctrs can have more than 1 word if the firmware chooses
to interleave firmware/hardware counters indicies. Even though it's a
unlikely scenario, handle that case by iterating over all the words
instead of just using the first word.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-9-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>

diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index f235018986575e016ca9565bc7bfb4811b304246..4eacd89141a97e5906164875f047a8d1f6ed4719 100644 (file)
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -652,10 +652,12 @@ static inline void pmu_sbi_stop_all(struct riscv_pmu *pmu)
 static inline void pmu_sbi_stop_hw_ctrs(struct riscv_pmu *pmu)
 {
        struct cpu_hw_events *cpu_hw_evt = this_cpu_ptr(pmu->hw_events);
+       int i;
 
-       /* No need to check the error here as we can't do anything about the error */
-       sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, 0,
-                 cpu_hw_evt->used_hw_ctrs[0], 0, 0, 0, 0);
+       for (i = 0; i < BITS_TO_LONGS(RISCV_MAX_COUNTERS); i++)
+               /* No need to check the error here as we can't do anything about the error */
+               sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, i * BITS_PER_LONG,
+                         cpu_hw_evt->used_hw_ctrs[i], 0, 0, 0, 0);
 }
 
 /*
@@ -667,7 +669,7 @@ static inline void pmu_sbi_stop_hw_ctrs(struct riscv_pmu *pmu)
 static inline void pmu_sbi_start_overflow_mask(struct riscv_pmu *pmu,
                                               unsigned long ctr_ovf_mask)
 {
-       int idx = 0;
+       int idx = 0, i;
        struct cpu_hw_events *cpu_hw_evt = this_cpu_ptr(pmu->hw_events);
        struct perf_event *event;
        unsigned long flag = SBI_PMU_START_FLAG_SET_INIT_VALUE;
@@ -676,11 +678,12 @@ static inline void pmu_sbi_start_overflow_mask(struct riscv_pmu *pmu,
        struct hw_perf_event *hwc;
        u64 init_val = 0;
 
-       ctr_start_mask = cpu_hw_evt->used_hw_ctrs[0] & ~ctr_ovf_mask;
-
-       /* Start all the counters that did not overflow in a single shot */
-       sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, 0, ctr_start_mask,
-                 0, 0, 0, 0);
+       for (i = 0; i < BITS_TO_LONGS(RISCV_MAX_COUNTERS); i++) {
+               ctr_start_mask = cpu_hw_evt->used_hw_ctrs[i] & ~ctr_ovf_mask;
+               /* Start all the counters that did not overflow in a single shot */
+               sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, i * BITS_PER_LONG, ctr_start_mask,
+                       0, 0, 0, 0);
+       }
 
        /* Reinitialize and start all the counter that overflowed */
        while (ctr_ovf_mask) {