drm/i915/dp: Rename helper to get DSC max pipe_bpp

The helper intel_dp_dsc_compute_bpp gives the maximum
pipe bpp that is allowed with DSC.

Rename the this to reflect that it returns max pipe bpp supported
with DSC.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-13-ankit.k.nautiyal@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 60c66cc720be84ed9c6415f49f5f3beb03b16677..db136349d82dc9431e49f043ecc298b0bc73070f 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1183,7 +1183,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
                 * TBD pass the connector BPC,
                 * for now U8_MAX so that max BPC on that platform would be picked
                 */
-               pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, U8_MAX);
+               pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp, U8_MAX);
 
                /*
                 * Output bpp is stored in 6.4 format so right shift by 4 to get the
@@ -1543,7 +1543,7 @@ u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915)
        return 0;
 }
 
-int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 max_req_bpc)
+int intel_dp_dsc_compute_max_bpp(struct intel_dp *intel_dp, u8 max_req_bpc)
 {
        struct drm_i915_private *i915 = dp_to_i915(intel_dp);
        int i, num_bpc;
@@ -1731,8 +1731,8 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
                                 "Cannot force DSC BPC:%d, due to DSC BPC limits\n",
                                 intel_dp->force_dsc_bpc);
 
-                       pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp,
-                                                           conn_state->max_requested_bpc);
+                       pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp,
+                                                               conn_state->max_requested_bpc);
 
                        if (!is_dsc_pipe_bpp_sufficient(dev_priv, pipe_bpp)) {
                                drm_dbg_kms(&dev_priv->drm,

diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 6fd423463f5c4d15f95c30b88e74fe81d6eeeb76..788a577ebe16e2d6e0890166261b0867e30f7f46 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -106,7 +106,7 @@ void intel_read_dp_sdp(struct intel_encoder *encoder,
                       struct intel_crtc_state *crtc_state,
                       unsigned int type);
 bool intel_digital_port_connected(struct intel_encoder *encoder);
-int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc);
+int intel_dp_dsc_compute_max_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc);
 u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915,
                                        u32 link_clock, u32 lane_count,
                                        u32 mode_clock, u32 mode_hdisplay,

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 4895d624291529f0cc3adf64cd1a6544f194fa26..3eb085fbc7c825b2c7699342b562806be33f4ef5 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -971,7 +971,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
                 * TBD pass the connector BPC,
                 * for now U8_MAX so that max BPC on that platform would be picked
                 */
-               int pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, U8_MAX);
+               int pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp, U8_MAX);
 
                if (drm_dp_sink_supports_fec(intel_dp->fec_capable)) {
                        dsc_max_compressed_bpp =