ARM: dts: meson: drop "sana" clock from SAR ADC
authorXingyu Chen <xingyu.chen@amlogic.com>
Thu, 16 Nov 2017 09:01:15 +0000 (17:01 +0800)
committerKevin Hilman <khilman@baylibre.com>
Thu, 7 Dec 2017 01:03:47 +0000 (17:03 -0800)
The SAR ADC modules doesn't require The "sana" clock.

Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm/boot/dts/meson8.dtsi
arch/arm/boot/dts/meson8b.dtsi

index af3aa7058c5a462024b6ad254d51444cc109acf5..b962e11263e70f8286385ade68f51e163a0c90cf 100644 (file)
 &saradc {
        compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc";
        clocks = <&clkc CLKID_XTAL>,
-               <&clkc CLKID_SAR_ADC>,
-               <&clkc CLKID_SANA>;
-       clock-names = "clkin", "core", "sana";
+               <&clkc CLKID_SAR_ADC>;
+       clock-names = "clkin", "core";
 };
 
 &sdio {
index 65e7d026f79795ccd2d5655445e1a957137de2cb..b6de3edfcb2165ae81a4a6fb171a7991bd4abcfb 100644 (file)
 &saradc {
        compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
        clocks = <&clkc CLKID_XTAL>,
-               <&clkc CLKID_SAR_ADC>,
-               <&clkc CLKID_SANA>;
-       clock-names = "clkin", "core", "sana";
+               <&clkc CLKID_SAR_ADC>;
+       clock-names = "clkin", "core";
 };
 
 &sdio {